Re: [PATCH v3 00/14] iio: adc: Add AD7768/AD7768-4 ADC driver support
Andy Shevchenko <[email protected]>
| Newsgroups | org.kernel.vger.linux-iio,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-doc,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel |
|---|---|
| Organization | Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo |
| Message-ID | <[email protected]> |
On Thu, Aug 13, 2026 at 03:56:53PM +0200, Janani Sunil wrote: > Add support for Analog Devices AD7768 and AD7768-4, 24-bit simultaneous > sampling Sigma-Delta ADCs with automatic power mode selection. > > Datasheet: > https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768.pdf > > **Device Overview:** > The AD7768 is an 8-channel, 24-bit simultaneous sampling ADC. The > AD7768-4 is a 4-channel variant. Both support configurable power modes, > programmable decimation filters, and a high-speed serial interface with > 1, 2, 4, or 8 data output lines. Per-channel offset, gain, and phase > calibration registers are available. > > **Features Implemented:** > - Support for AD7768 (8-channel) and AD7768-4 (4-channel) via device > match data. > - Automatic low-noise power mode selection (fast, median, low power) > with associated decimation rate and output data rate tables. > - Per-channel offset, gain, and conversion delay via IIO attributes. > - SPI communication with custom regmap bus for the device's protocol. > - IIO backend integration with adi-axi-adc for high-speed data capture. > - CRC data integrity verification over the serial interface. > - GPIO auxiliary driver to expose the 5 on-chip GPIO pins. > - VCM common-mode output exposed through the regulator framework, with > runtime PM management while the output is enabled. > > **Patch Summary:** > 1. Add the AD7768 and AD7768-4 devicetree binding. > 2. Add the IIO backend CRC operation. > 3. Initialize the AXI ADC state mutex. > 4. Implement CRC control in the AXI ADC backend. > 5. Add core AD7768 and AD7768-4 capture support. > 6. Add configurable sampling rates, power modes, and filters. > 7. Add per-channel offset and gain calibration controls. > 8. Add per-channel conversion delay. > 9. Expose the VCM output through the regulator framework. > 10. Register the GPIO auxiliary device from the parent driver. > 11. Use regmap_test_bits() for single-bit gpio-regmap reads. > 12. Add optional runtime PM support to gpio-regmap. > 13. Add the AD7768 GPIO auxiliary driver. > 14. Add driver documentation. > > **Testing:** > The driver was compiled and tested on the EVAL-AD7768FMCZ using a > Zedboard with a mainline kernel. > > **Driver Rationale:** > The AD7768/AD7768-4 warrants its own driver due to several > device-specific characteristics: > > 1. A custom SPI framing protocol: register reads and writes use 16-bit > frames with embedded read/write bits and register address fields, > requiring a custom regmap bus implementation rather than the standard > SPI regmap backend. > > 2. A coupled power mode / sample rate model: available output data rates > are not a flat list but depend on the active power mode (fast, median, > low power), each with its own set of valid decimation rates. This > relationship must be managed in the driver. > > 3. Simultaneous sampling across all channels with per-channel calibration > registers (24-bit offset, gain, and phase) that are laid out > differently between the 8-channel AD7768 and the 4-channel AD7768-4, > requiring device-specific register mapping. > > 4. IIO backend integration for high-speed data capture via adi-axi-adc, > including CRC data integrity verification over the serial interface. > > 5. On-chip GPIO: 5 general-purpose I/O pins exposed via an auxiliary bus > driver, sharing the parent's regmap and runtime PM. The GPIO driver looks nice, but regmap API should use cleanup.h instead of custom (legacy) approach. -- With Best Regards, Andy Shevchenko