Re: [PATCH v4 1/4] dt-bindings: timer: Add the Renesas RZ/N1 timer

Wolfram Sang <[email protected]> Tue, 4 Aug 2026 22:06:15 +0200

Newsgroups	org.kernel.vger.linux-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-renesas-soc
Message-ID	<anJGNyNxcSAwylK8@ninjato>

On Tue, Jul 21, 2026 at 10:29:47AM +0200, Herve Codina (Schneider Electric) wrote:
> The Renesas RZ/N1 timer block controller is the controller in charge of
> timers available in the Renesas RZ/N1 SoCs family.
> 
> This controller handles 8 timers:
>  - 6 16-bit timers
>  - 2 32-bit timers
> 
> Signed-off-by: Herve Codina (Schneider Electric) <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Geert Uytterhoeven <[email protected]>

In general:

Reviewed-by: Wolfram Sang <[email protected]>

One nit:

> +        reg = <0x51001000 0x400>;

Isn't 0x400 a bit excessive? The last documented register in my docs is
0x114, so maybe 0x200 will do above?

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