Re: [PATCH] m68k: Fix task info flags handling for 68000

Greg Ungerer <[email protected]>
Newsgroups org.kernel.vger.linux-m68k
Message-ID <[email protected]>
Hi Daniel,

On 17/3/26 08:05, Daniel Palmer wrote:
> Hi Greg,
> 
> On Mon, 16 Mar 2026 at 23:08, Greg Ungerer <[email protected]> wrote:
>>
>> The comments from arch/m68k/include/asm/thread_info.h are this:
>>
>> /* entry.S relies on these definitions!
>>    * bits 0-7 are tested at every exception exit
>>    * bits 8-15 are also tested at syscall exit
>>    */
>>
>> So looking at what check is in arch/m68k/coldfire/entry.S:
>>
>>       moveb   %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */
>>
>> In arch/m68k/kernel/entry.S it looks to be doing basically the same thing:
>>
>>       moveb   %a1@(TINFO_FLAGS+3),%d0
>>
>> So they do really only check bits 0-7 here.
>>
>> If you code the check like that do you still get correct running behavior?
> 
> That seems to work.

Thanks for the confirmation.


> One thing I'm unsure about is this in the coldfire version:
> 
> Luser_return:
> movel %sp,%d1 /* get thread_info pointer */
> andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
> movel %d1,%a0
> moveb %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */
> 
> ^^^^^^
> So the bottom 8 bits are in d1
> 
> jne Lwork_to_do /* still work to do */
> 
> Lreturn:
> RESTORE_USER
> 
> Lwork_to_do:
> movel %a0@(TINFO_FLAGS),%d1 /* get thread_info->flags */
> 
> ^^^^^^^
> Now the whole value is loaded into d1 to do the bit test.. but the
> value needed is already in d1 as we'll be testing bit 7?

Yeah, agreed. The more I look at the ColdFire version the more I think it
may not be totally correct. Its flow here doesn't match the comments from
arch/m68k/include/asm/thread_info.h. The legacy MMU m68k code does appear
to do as the comments say with respect to the TINFO flag bits.

The ColdFire code was forked from the original arch/m68k/kernel/entry.S
a very long time back - there was some differences that needed to be dealt
with.

Anyway what I am looking more closely at is if the higher TINFO flag bits
are actually not being checked at all - so things like single stepping.

Regards
Greg



> move #0x2000,%sr /* enable intrs again */
> btst #TIF_NEED_RESCHED,%d1
> jne reschedule
> 
> 
> Thanks,
> 
> Daniel
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