Re: [RFC 4/4] m68k: coldfire: fix non-standard readX()/writeX() functions

Greg Ungerer <[email protected]>
Newsgroups org.kernel.vger.linux-m68k,org.kernel.vger.dmaengine,org.kernel.vger.linux-can,org.kernel.vger.linux-kernel,org.kernel.vger.linux-spi
Message-ID <[email protected]>
Hi Angelo,

On 10/6/26 07:30, Angelo Dureghello wrote:
> On Mon, Jun 01, 2026 at 04:43:32PM +0200, Christoph Hellwig wrote:
>> On Sun, May 31, 2026 at 11:42:26PM +1000, Greg Ungerer wrote:
>>> I don't think that is right. The way the underlying data cache is setup for
>>> MMU ColdFire (via the ACR/CACR registers) means that individual pages cannot
>>> be marked as non-cached. So coherent memory allocations are not possible -
>>> at least the way things are today.
>>>
>>> It would be possible to set aside a chunk of RAM at kernel startup time
>>> to use as a pool for coherent allocations (since it could be marked as
>>> non-cached via the ACR/CACR registers), but there is no code to support doing
>>> that today.
>>
>> With CONFIG_DMA_GLOBAL_POOL there is some generic code dealing with
>> most of this.  But if this driver worked on coldfire in the past,
>> it must have been fine with non-coherent memory and could use the
>> non-coherent allocator.
>>
> 
> Ok, thanks, so the driver is working fine with non coherent memory but may
> be just for a case. I will try to setup a better SD test. And will send
> another patch to have dma enabled with non coherent allocator.

Sounds good. Thanks for taking the time to look into this.

Regards
Greg
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