Re: [PATCH v10 2/2] media: i2c: Add driver for AMS-OSRAM Mira220

Hi Jacopo,

On Mon, Aug 03, 2026 at 12:59:31PM +0200, Jacopo Mondi wrote:
> Hi Sakari
> 
> On Mon, Aug 03, 2026 at 01:28:43PM +0300, Sakari Ailus wrote:
> > Hi Jacopo,
> >
> > On Fri, Jul 31, 2026 at 04:15:53PM +0200, Jacopo Mondi wrote:
> >
> > ...
> >
> > > > > +	/* Sensor control mode */
> > > > > +	{ CCI_REG8(0x0043), 0x0 }, //  Sensor Control Mode.SLEEP_POWER_MODE(0)
> > > > > +	{ CCI_REG8(0x0043), 0x0 }, //  Sensor Control Mode.IDLE_POWER_MODE(0)
> > > > > +	{ CCI_REG8(0x0043), 0x4 }, //  Sensor Control Mode.SYSTEM_CLOCK_ENABLE(0)
> > > > > +	{ CCI_REG8(0x0043), 0xC }, //  Sensor Control Mode.SRAM_CLOCK_ENABLE(0)
> > > > > +	{ CCI_REG8(0x1001), 0x41 }, //  Sensor Control Mode.EXT_EVENT_SEL(0)
> > > > > +	{ CCI_REG8(0x10f2), 0x1 }, //  Sensor Control Mode.NB_OF_FRAMES_A(0)
> > > > > +	{ CCI_REG8(0x10f3), 0x0 }, //  Sensor Control Mode.NB_OF_FRAMES_A(1)
> > > > > +	{ CCI_REG8(0x0012), 0x0 }, //  IO Drive Strength.DIG_DRIVE_STRENGTH(0)
> > > > > +	{ CCI_REG8(0x0012), 0x0 }, //  IO Drive Strength.CCI_DRIVE_STRENGTH(0)
> > > > > +	{ CCI_REG8(0x1001), 0x41 }, //  Readout && Exposure.EXT_EXP_PW_SEL(0)
> > > > > +	{ CCI_REG8(0x10d0), 0x0 }, //  Readout && Exposure.EXT_EXP_PW_DELAY(0)
> > > > > +	{ CCI_REG8(0x10d1), 0x0 }, //  Readout && Exposure.EXT_EXP_PW_DELAY(1)
> > > > > +	/* MIPI */
> > > > > +	{ CCI_REG8(0x6006), 0x0 }, //  MIPI.TX_CTRL_EN(0)
> > > > > +	{ CCI_REG8(0x5004), 0x1 }, //  MIPI.datarate
> > > > > +	{ CCI_REG8(0x5086), 0x2 }, //  MIPI.datarate
> > > > > +	{ CCI_REG8(0x5087), 0x4e }, //  MIPI.datarate
> > > > > +	{ CCI_REG8(0x5088), 0x0 }, //  MIPI.datarate
> > > > > +	{ CCI_REG8(0x5090), 0x0 }, //  MIPI.datarate
> > > >
> > > > How many of these registers are actually 16 or 32 bits? Does the sensor
> > > > support wider than single-octet writes -- few don't?
> > >
> > > The sensor is said to support both single read/write and burst read/write
> > > sequences.
> > >
> > > There is room for improvements here, but as the startup latency is not
> > > a concern for the time being, I would leave this as an exercize for
> > > later
> >
> > Related to the previous comment, it'd be nice to have human-readable names
> > also for these registers. I'm fine with that if you promise to address this
> > later. :-)
> 
> Only for the MIPI related ones you mean ?

Whatever seems feasible?

> 
> I'll have to add support for non-cont clock mode and other bus configs
> next, so this part will be reworked anyway.

Ok. Do you actually need non-continuous clock mode for something?

> 
> The other registers in the table are not all documented, so I can't
> help much there.

That's too often the case. :-\

> 
> >
> > ...
> >
> > > > > +static struct i2c_driver mira220_i2c_driver = {
> > > > > +	.driver = {
> > > > > +		.name = "mira220",
> > > > > +		.of_match_table	= mira220_dt_ids,
> > > > > +		.pm = pm_ptr(&mira220_pm_ops),
> >
> > If CONFIG_PM isn't defined, mira220_pm_ops needs to use __maybe_unused. I'd
> > just drop pm_ops() here.
> 
> Isn't pm_ptr() there exactly to avoid __maybe_unused ?
> 
> See 9ab2bd7760a9edc23dfef71bb94092359ce94024 in example

Right; this works as the symbol is still always referred. Please ignore the
comment.

-- 
Regards,

Sakari Ailus