Re: [PATCH 2/2] media: i2c: Add Himax HM1092 image sensor driver

Hi Jake,

Thanks for the detailed review and for confirming the Intel-side behaviour.

Good to know that ipu bridge  The latest publicly posted HM1092 series
is v6, so I prefer to address
the Intel support in v7 rather than defer it to a follow-up.

Could you send the ACPI match, complete Dell 648x368 register sequence
and the 19.2 MHz/180.48 MHz configuration as a patch on top of v6? I
will fold it into v7 and send the integrated driver back to you for
testing before posting it.

For configuration selection, I propose matching the actual input clock
and an endpoint link frequency as a pair. The driver can obtain the
input clock through devm_v4l2_sensor_clk_get()
and clk_get_rate() 24 MHz from DT on the ASUS and 19.2 MHz from
INT3472 on the Dell and obtain the permitted link frequencies from the
DT or ipu-bridge endpoint. Driver-owned profiles
would then select the corresponding mode and PLL programming:

- 24 MHz EXTCLK, 180 MHz link frequency, ASUS 560x360 mode
- 19.2 MHz EXTCLK, 180.48 MHz link frequency, Dell 648x368 mode

This avoids relying on DMI data or on the ordering of the two
frequencies advertised by ipu-bridge.

I will also make the exposure comment explicit: the default of 500 is
intentional because it matches the value programmed at 0x0202/0x0203
by the initialization sequence.

The control implementation is based substantially on your register
analysis and implementation notes, so I agree that Co-developed-by is
appropriate. I will include:

Co-developed-by: Jake Steinman [email protected] ([email protected])
Signed-off-by: Jake Steinman [email protected] ([email protected])
Assisted-by: Claude:claude-opus-5

and retain the links documenting the register-analysis provenance.

Regards,
Ramshouriesh