Re: [PATCH 1/4] media: dt-bindings: Add Rockchip JPEG decoder

On Mon, Aug 24, 2026 at 09:01:09AM +0200, Sascha Hauer wrote:
> Add a devicetree binding schema for the JPEG hardware decoder Rockchip
> integrates into a number of its SoCs.  Documents the single register
> window (task registers plus the LLP link-table block at offset 0x300),
> the decode interrupt, the aclk/hclk clocks, the AXI/AHB resets, the IOMMU
> and the power domain.
> 
> The core is not tied to one SoC.  Downstream it is known as the VDPU720
> and the same block sits on the RK3528, RK3562, RK356x, RK3576, RK3588 and
> RV1126B, with only the clocks, the resets and the power domain differing,
> none of which this schema constrains.  A compatible per SoC is all it
> takes to cover them; the RK3568 and the RK3588 are the two that have been
> tested and are enabled here.
> 
> The resets and the power domain are required.  The block cannot be
> reached with its domain off, and the driver falls back to pulsing the
> reset lines when a frame times out and the in-block soft reset does not
> complete, which a node without them would leave with no way to recover.
> 
> The IOMMU stays optional.  The driver never refers to it, it is a platform
> integration detail, and rockchip-vpu.yaml does not require it for the
> other codec blocks on these SoCs either.
> 
> Assisted-by: Claude:claude-opus-5

Missing signoff.

> ---
>  .../bindings/media/rockchip,jpeg-decoder.yaml      | 92 ++++++++++++++++++++++
>  MAINTAINERS                                        |  8 ++
>  2 files changed, 100 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/rockchip,jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/rockchip,jpeg-decoder.yaml
> new file mode 100644
> index 0000000000000..e20c1bf43ef3e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/rockchip,jpeg-decoder.yaml

Filename matching compatible please.

> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/rockchip,jpeg-decoder.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip JPEG Decoder
> +
> +maintainers:
> +  - Lucas Sinn <[email protected]>
> +  - Sascha Hauer <[email protected]>
> +
> +description:
> +  Rockchip's in-house JPEG/MJPEG hardware decoder, known downstream as the
> +  VDPU720.  The same core is integrated into a number of Rockchip SoCs, which
> +  differ only in the clocks, resets and power domain they are wired to.  A
> +  dedicated Link List Processor (LLP) register block, located at offset 0x300
> +  within the same register window, allows the hardware to decode a chain of
> +  frames autonomously ("link mode").
> +
> +properties:
> +  compatible:
> +    enum:
> +      - rockchip,rk3568-jpegd
> +      - rockchip,rk3588-jpegd
> +
> +  reg:
> +    maxItems: 1
> +    description:
> +      The decoder register window.  It covers both the task (function)
> +      registers at offset 0x000 and the LLP (link table) registers at
> +      offset 0x300.
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: AXI clock
> +      - description: AHB clock
> +
> +  clock-names:
> +    items:
> +      - const: aclk
> +      - const: hclk

IMO, match resets and drop the obvious "clk" from here.

Fine otherwise.

pw-bot: changes-requested

Thanks,
Conor.

> +
> +  resets:
> +    items:
> +      - description: AXI reset line
> +      - description: AHB reset line
> +
> +  reset-names:
> +    items:
> +      - const: axi
> +      - const: ahb
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  iommus:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +  - power-domains
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/rockchip,rk3588-cru.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/power/rk3588-power.h>
> +    #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> +
> +    video-codec@fdb90000 {
> +        compatible = "rockchip,rk3588-jpegd";
> +        reg = <0xfdb90000 0x400>;
> +        interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
> +        clocks = <&cru ACLK_JPEG_DECODER>, <&cru HCLK_JPEG_DECODER>;
> +        clock-names = "aclk", "hclk";
> +        resets = <&cru SRST_A_JPEG_DECODER>, <&cru SRST_H_JPEG_DECODER>;
> +        reset-names = "axi", "ahb";
> +        iommus = <&jpegd_mmu>;
> +        power-domains = <&power RK3588_PD_VDPU>;
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8014b9f8253ed..baea7e42663a7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -23424,6 +23424,14 @@ F:	Documentation/userspace-api/media/v4l/metafmt-rkisp1.rst
>  F:	drivers/media/platform/rockchip/rkisp1
>  F:	include/uapi/linux/rkisp1-config.h
>  
> +ROCKCHIP JPEG DECODER DRIVER
> +M:	Lucas Sinn <[email protected]>
> +M:	Sascha Hauer <[email protected]>
> +L:	[email protected]
> +L:	[email protected]
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/media/rockchip,jpeg-decoder.yaml
> +
>  ROCKCHIP RK3568 RANDOM NUMBER GENERATOR SUPPORT
>  M:	Daniel Golle <[email protected]>
>  M:	Aurelien Jarno <[email protected]>
> 
> -- 
> 2.47.3
>

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