[PATCH 2/2] mips: dts: econet: Describe dual-VPE 34Kc processor

The 34Kc processor has two VPEs (threads) and the interrupt controller
on the EN751221 re-routes (in hardware) the software interrupt pins
zero and one to numbers 7 and 8 in the flat VEIC interrupt domain.

Signed-off-by: Caleb James DeLisle <[email protected]>
---
 arch/mips/boot/dts/econet/en751221.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/mips/boot/dts/econet/en751221.dtsi b/arch/mips/boot/dts/econet/en751221.dtsi
index 72cb65654c34..57ae84a8a9f8 100644
--- a/arch/mips/boot/dts/econet/en751221.dtsi
+++ b/arch/mips/boot/dts/econet/en751221.dtsi
@@ -23,6 +23,12 @@ cpu@0 {
 			compatible = "mips,mips34Kc";
 			reg = <0>;
 		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "mips,mips34Kc";
+			reg = <1>;
+		};
 	};
 
 	cpuintc: interrupt-controller {
@@ -65,6 +71,7 @@ intc: interrupt-controller@1fb40000 {
 		interrupt-controller;
 		#interrupt-cells = <1>;
 		econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
+		econet,cpu-interrupt-map = <7 0>, <8 1>;
 	};
 
 	pciecfg: pciecfg@1fb80000 {
-- 
2.39.5