RE: [PATCH v18 00/12] Add Renesas RZ/G3L SD/eMMC support
Biju Das <[email protected]> Thu, 9 Jul 2026 16:24:26 +0000
| Newsgroups | org.kernel.vger.linux-mmc,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-renesas-soc |
|---|---|
| Message-ID | <TY3PR01MB113462BB275A7939C5A82CCB586FE2@TY3PR01MB11346.jpnprd01.prod.outlook.com> |
Hi Wolfram, > -----Original Message----- > From: Biju <[email protected]> > Sent: 22 June 2026 16:56 > Subject: [PATCH v18 00/12] Add Renesas RZ/G3L SD/eMMC support > > From: Biju Das <[email protected]> > > RZ/G3L SoC has: > > Channel 0 supports SD and eMMC (including HS400/HS400ES). > Channel 1 supports SD and eMMC (except for HS400). > Channel 2 supports SD. > > The SoC supports a maximum frequency of 150 MHz. The SD0 interface does not support IOVS and PWEN in the > SDHI register (no internal regulator), unlike SD1 and SD2. It has an internal divider for all modes > except HS400. > It also has a 2048-bit divider compared to 512 on others. Moreover RZ/G3L supports HS400 enhanced strobe > mode. I will be sending an improved version of the patch series that Handles clock divider correctly. Cheers, Biju > > v17->v18: > * Collected tag > * Merged patch #4 and #5 and updated commit description > * Annotated the empty sentinel entries in the OF match tables with a > "Sentinel." comment for clarity. > * Retained the tag as it is a trivial cleanup. > * New patches drop struct renesas_sdhi_hw_info, instead using > renesas_sdhi_of_data and tmio_mmc_data. > * Dropped clk, pinctrl, SoC, and board dtsi from this patch series; > will send later. > v1->v17: > * Collected tag for binding patch. > * Resending the series as there is an issue with patch threading from > patch #14. > > Biju Das (12): > dt-bindings: mmc: renesas,sdhi: Document RZ/G3L (r9a08g046) SoC > mmc: renesas_sdhi: Fix whitespace alignment in struct > renesas_sdhi_of_data > mmc: renesas_sdhi: Add clk_mask field to support SoC-specific clock > divider widths > mmc: renesas_sdhi: Add max_divider field to support SoC-specific clock > divider ranges > mmc: renesas_sdhi: Add tuning delay support for RZ/G2L > mmc: renesas_sdhi: Add TMIO_MMC_INTERNAL_DIVIDER flag > mmc: renesas_sdhi: Add optional axis/axim reset controls > mmc: renesas_sdhi: Add RZ/G3L SDHI support > mmc: renesas_sdhi: Save and restore IOVS across suspend/resume > mmc: renesas_sdhi: Make HS400 OSEL bit configurable per SoC > mmc: renesas_sdhi: Add RZ/G3L HS400 support > mmc: renesas_sdhi: Add HS400 enhanced strobe support for RZ/G3L > > .../devicetree/bindings/mmc/renesas,sdhi.yaml | 101 ++++++-- > drivers/mmc/host/renesas_sdhi.h | 12 +- > drivers/mmc/host/renesas_sdhi_core.c | 239 ++++++++++++++---- > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 73 +++++- > drivers/mmc/host/renesas_sdhi_sys_dmac.c | 12 +- > include/linux/platform_data/tmio.h | 18 ++ > 6 files changed, 370 insertions(+), 85 deletions(-) > > -- > 2.43.0