[PATCH 5/5] arm64: tegra: Add Tegra264 SDMMC1 device tree node

Prathamesh Shete <[email protected]> Fri, 24 Jul 2026 07:56:59 +0000
Newsgroups org.kernel.vger.linux-mmc,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-tegra
Message-ID <[email protected]>
Add device tree node for the Tegra264 SDMMC1 instance.

Signed-off-by: Prathamesh Shete <[email protected]>
---
 arch/arm64/boot/dts/nvidia/tegra264.dtsi | 34 ++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
index 2d2cb1a3d95c..f1eafb6a3970 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
@@ -3631,6 +3631,40 @@
 			status = "disabled";
 		};
 
+		mmc@c570000 {
+			compatible = "nvidia,tegra264-sdhci", "nvidia,tegra194-sdhci";
+			reg = <0x00 0x0c570000 0x0 0x10000>;
+			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA264_CLK_SDMMC1>,
+				 <&bpmp TEGRA264_CLK_SDMMC_LEGACY_TM>;
+			clock-names = "sdhci", "tmclk";
+			assigned-clocks = <&bpmp TEGRA264_CLK_SDMMC1>,
+					  <&bpmp TEGRA264_CLK_PLLC4_MUXED>;
+			assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLC4_MUXED>,
+						 <&bpmp TEGRA264_CLK_PLLC4_OUT0>;
+			resets = <&bpmp TEGRA264_RESET_SDMMC1>;
+			reset-names = "sdhci";
+			interconnects = <&mc TEGRA264_MEMORY_CLIENT_SDMMC0R &emc>,
+					<&mc TEGRA264_MEMORY_CLIENT_SDMMC0W &emc>;
+			interconnect-names = "dma-mem", "write";
+			iommus = <&smmu2 TEGRA264_SID_SDMMC0>;
+			nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
+			nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x07>;
+			nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
+			nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
+			nvidia,pad-autocal-pull-up-offset-sdr104 = <0x00>;
+			nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
+			nvidia,default-tap = <0x6>;
+			nvidia,default-trim = <0x0>;
+			sd-uhs-sdr12;
+			sd-uhs-sdr25;
+			sd-uhs-sdr50;
+			sd-uhs-sdr104;
+			mmc-hs200-1_8v;
+			dma-coherent;
+			status = "disabled";
+		};
+
 		i2c0: i2c@c630000 {
 			compatible = "nvidia,tegra264-i2c";
 			reg = <0x00 0x0c630000 0x0 0x10000>;
-- 
2.17.1