Re: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support

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On Wed, Jul 29, 2026 at 05:05:43AM +0000, Rohan Santosh Joshi wrote:
> Hi Conor,
>=20
> Currently, there is no public domain information that confirms if the elb=
a supports CQE.

Well then modifying it to add CQE is wrong.

> In the last (v2) patch series, Krzysztof mentioned about why the Pensando=
 Elba is NOT being modified/considered for the CQE.

Right, and he's coming at this from the same perspective as me.
We both want to know why you're making (or not making) the changes that
you are to the binding. You didn't explain in v2 why the elba didn't
need the change and now in v3 you haven't actually explained that it
does.

> The current implementation marks CQE as optional space and the related dr=
iver can take the CQE or non-CQE path depending on whether the DT defines i=
t.
> Please refer to the cover letter for additional details on this.
>=20
> Given the above information, can you please confirm if the next patch sho=
uld modify the elba or restrict the new reg entries to device compatibles?=
=20

You need to figure that out, perhaps by CCing the person responsible for
the addition and maintainance of the platform?

Additionally, please fix your quoting.

Thanks,
Conor.

>=20
> Best Regards,
> Rohan=20
>=20
> -----Original Message-----
> From: Conor Dooley <[email protected]>=20
> Sent: Wednesday, July 22, 2026 10:07 PM
> To: Rohan Santosh Joshi <[email protected]>
> Cc: Ulf Hansson <[email protected]>; Rob Herring <[email protected]>; Krzyszt=
of Kozlowski <[email protected]>; Conor Dooley <[email protected]>; Masa=
hiro Yamada <[email protected]>; Adrian Hunter <adrian.hunter@i=
ntel.com>; [email protected]; [email protected]; linux-ker=
[email protected]; Milind Parab <[email protected]>; Pawel Laszczak <paw=
[email protected]>; Swapnil Kashinath Jakhade <[email protected]>; Manikan=
dan Karunakaran Pillai <[email protected]>; [email protected]
> Subject: Re: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support
>=20
> EXTERNAL MAIL
>=20
>=20
> On Wed, Jul 22, 2026 at 04:18:37PM +0530, Rohan Joshi via B4 Relay wrote:
> > From: Rohan Joshi <[email protected]>
> >=20
> > Cadence host controller can optionally support CQE.
> > Add optional CQE register space to cdns sdhci bindings.
> >=20
> > Signed-off-by: Rohan Joshi <[email protected]>
> > ---
> >  .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 28 ++++++++++++++=
+++++---
> >  1 file changed, 25 insertions(+), 3 deletions(-)
> >=20
> > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Do=
cumentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > index 6c7317d13aa6..10bc9ac2073a 100644
> > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > @@ -22,7 +22,14 @@ properties:
> > =20
> >    reg:
> >      minItems: 1
> > -    maxItems: 2
> > +    maxItems: 3
> > +
> > +  reg-names:
> > +    minItems: 1
> > +    items:
> > +      - const: hc
> > +      - enum: [bctl, cqhci]
> > +      - const: cqhci
> > =20
> >    interrupts:
> >      maxItems: 1
> > @@ -131,13 +138,27 @@ allOf:
> >      then:
> >        properties:
> >          reg:
> > +          minItems: 2
> >            items:
> >              - description: Host controller registers
> >              - description: Elba byte-lane enable register for writes
> > +            - description: CQE (Command Queuing Engine) registers (opt=
ional)
>=20
> I see no explanation in your commit message for why the elba is being
> modified.
>=20
> This new reg entry should be restricted to only the device-specific
> compatibles that actually support it.
>=20
> pw-bot: changes-requested
>=20
> Thanks,
> Conor.
>=20
> > +        reg-names:
> > +          minItems: 2
> > +          items:
> > +            - const: hc
> > +            - const: bctl
> > +            - const: cqhci
> >      else:
> >        properties:
> >          reg:
> > -          maxItems: 1
> > +          items:
> > +            - description: Host Controller registers
> > +            - description: CQE (Command Queuing Engine) registers (opt=
ional)
> > +        reg-names:
> > +          items:
> > +            - const: hc
> > +            - const: cqhci
> > =20
> >  unevaluatedProperties: false
> > =20
> > @@ -145,7 +166,8 @@ examples:
> >    - |
> >      emmc: mmc@5a000000 {
> >          compatible =3D "socionext,uniphier-sd4hc", "cdns,sd4hc";
> > -        reg =3D <0x5a000000 0x400>;
> > +        reg =3D <0x5a000000 0x400>, <0x5a000400 0x060>;
> > +        reg-names =3D "hc", "cqhci";
> >          interrupts =3D <0 78 4>;
> >          clocks =3D <&clk 4>;
> >          bus-width =3D <8>;
> >=20
> > --=20
> > 2.43.0
> >=20
> >=20

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