Re: [patch 5/5] clocksource: Rewrite watchdog code completely

On Sat, Jan 24, 2026 at 12:18:01AM +0100, Thomas Gleixner wrote:

Patch 2 and 4 should say "Don't" in the subject title. :)

> The clocksource watchdog code has over time reached the state of an
> unpenetrable maze of duct tape and staples. The original design, which was

"impenetrable"

> made in the context of systems far smaller than today, is based on the
> assumption that the to be monitored clocksource (TSC) can be trivially
> compared against a known to be stable clocksource (HPET/ACPI-PM timer).
> 
> Over the years it turned out that this approach has major flaws:
> 
>   - Long delays between watchdog invocations can result in wrap arounds
>     of the reference clocksource
> 
>   - Scalability of the reference clocksource readout can degrade on large
>     multi-socket systems due to interconnect congestion
> 
> This was addressed with various heuristics which degraded the accurracy of

"accuracy"

But those are just nitpicks.

The overall thing sounds good to me, I haven't done any indepth review but
from a cursory look, it looks nice.

Testing looks good too on one machine so

Tested-by: Borislav Petkov (AMD) <[email protected]>

I say, let's queue it now so that it can get wider testing.

Thx.

-- 
Regards/Gruss,
    Boris.

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