Re: DWC eDMA weirdness
Niklas Cassel <[email protected]> Thu, 30 Jul 2026 12:43:20 +0200
| Newsgroups | org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <amsqyOvAHU8uD2Wa@ryzen> |
On Thu, Jul 30, 2026 at 05:39:46PM +0900, Koichiro Den wrote:
>
> I was struggling to reproduce this, but I think I figured out what triggers it.
> It happens when the 'dma' variant runs before DOORBELL_TEST, e.g. when running
> the full test suite with no arguments, or by running '-v dma' first.
>
> I think the following patch fixes it:
>
> diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
> index 89a4c498a17b..ec097c68cf5f 100644
> --- a/drivers/dma/dw-edma/dw-edma-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-core.c
> @@ -755,6 +755,7 @@ static int dw_edma_emul_irq_alloc(struct dw_edma *dw)
> return virq;
>
> irq_set_chip_and_handler(virq, &dw_edma_emul_irqchip, handle_level_irq);
> + irq_set_status_flags(virq, IRQ_LEVEL);
> irq_set_chip_data(virq, dw);
> irq_set_noprobe(virq);
>
> Could you test this?
That appears to fix my problem.
We have had a ton of DWC problems related to IRQs.
IIRC, most DWC IRQs, e.g. the embedded MSI controller on the PCIe controller
itself, works using level triggered IRQs.
However, e.g. MSIs themselves are by definition edge triggered, so there is
a difference of how you mark the IRQ handler in the DWC driver, and how you
configure the IRQ domain that you configure to the MSI/IRQ kernel code:
https://patchew.org/linux/20250205151635.v2.1.Id60295bee6aacf44aa3664e702012cb4710529c3@changeid/
Since this is for an IRQ within the PCIe controller, I think this is correct.
We've also seen problems where we've been clearing the level IRQ too
late, see e.g.
ca1658921b63 ("PCI: designware: Fix missing MSI IRQs")
which caused us to miss IRQs when two MSIs came very close after one another.
Kind regards,
Niklas