Re: [PATCH v1] PCI: xgene: Use managed clock for PCIe controller

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Spurious error messages logged when `devm_clk_get_enabled()` returns `-EPROBE_DEFER`.
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--- Patch [1]: [PATCH v1] PCI: xgene: Use managed clock for PCIe controller ---
commit 0cead2017a15cf2ef3dd587c853cc1410cad1d70
Author: Yuho Choi <[email protected]>

PCI: xgene: Use managed clock for PCIe controller

This commit simplifies the xgene PCIe port initialization by replacing
manual clock retrieval and enablement with devm_clk_get_enabled(). This
automatically handles unwinding the clock on probe failure and device removal.

> diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c
> --- a/drivers/pci/controller/pci-xgene.c
> +++ b/drivers/pci/controller/pci-xgene.c
> @@ -321,18 +321,11 @@ static void xgene_pcie_linkup(struct xgene_pcie *port,
>  static int xgene_pcie_init_port(struct xgene_pcie *port)
>  {
>  	struct device *dev = port->dev;
> -	int rc;
>  
> -	port->clk = clk_get(dev, NULL);
> +	port->clk = devm_clk_get_enabled(dev, NULL);
>  	if (IS_ERR(port->clk)) {
>  		dev_err(dev, "clock not available\n");
> -		return -ENODEV;
> -	}
> -
> -	rc = clk_prepare_enable(port->clk);
> -	if (rc) {
> -		dev_err(dev, "clock enable failed\n");
> -		return rc;
> +		return PTR_ERR(port->clk);

[Severity: Medium]
Does this unconditional dev_err() cause log spam during boot if
devm_clk_get_enabled() returns -EPROBE_DEFER?

Could dev_err_probe() be used here instead?

>  	}
>  
>  	return 0;

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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1