Re: [PCI] AMD RX780/RD790 root port and RX 6600 upstream bridge train at Gen2 x2; RX 570 reaches Gen2 x8 in the same slot

Hello,

A brief follow-up on this reproducible link-width issue:

The RX 6600 consistently trains the external 00:02.0 [1002:5978] <->
01:00.0 [1002:1478] link at Gen2 x2, including before amdgpu
initialization. The RX 570 trains at Gen2 x8 in the same motherboard,
slot, and Linux 6.18.38 environment. Retraining, Gen1-to-Gen2 cycling,
Secondary Bus Reset, and early-kernel retraining did not change the RX
6600 result.

Is this RX780/RD790 [1002:5978] <-> AMD [1002:1478] pairing affected
by any known interoperability erratum or suitable upstream PCI quirk?

Which specific read-only config-space data or kernel trace would best
distinguish a link-training compatibility failure from an electrical
failure of lanes 2–7?

Thank you.