Re: [PATCH v2] PCI: qcom: Block accesses to downstream devices on link down
Konrad Dybcio <[email protected]>
| Newsgroups | org.kernel.vger.linux-pci,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On 8/20/26 8:36 AM, Qiang Yu wrote:
> After a PCIe link goes down, software may still access the BAR (MMIO)
> space or configuration space of devices behind that link before recovery
> has run. As the link is down, these accesses never complete, resulting in
> a storm of Completion Timeout AERs.
[...]
> static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
> {
> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -1775,13 +1832,15 @@ static int qcom_pcie_reset_root_port(struct pci_host_bridge *bridge,
> u32 val;
> int ret;
>
> + mutex_lock(&pcie->hw_lock);
guard(mutex)(&pcie->hw_lock)
This decreases the number of AERs I see while de-authorizing the
PCIe link on a TBT3 connection to an ASUS PA27AC monitor from
"a whole lot" to just 1 on X1E80100 CRD
Tested-by: Konrad Dybcio <[email protected]> # X1E80100 CRD + ASUS PA27AC
Konrad