Re: [PATCH v8 02/22] RISC-V: Add Sxcsrind ISA extension CSR definitions
Paul Walmsley <[email protected]> Tue, 4 Aug 2026 17:42:43 -0600 (MDT)
| Newsgroups | org.kernel.vger.linux-perf-users,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <[email protected]> |
On Tue, 4 Aug 2026, Paul Walmsley wrote: > Thanks. It's easier for folks to grep and cross-reference if the official > RISC-V extension names are used whenever possible, rather than something > like Sxcsrind. Queued the following patch for v7.3. ... > > RISC-V: Add Smcsrind and Sscrind ISA extension CSR definitions > > From: Kaiwen Xue <[email protected]> > > This adds definitions of new CSRs and bits defined in the Smcsrind and > Sscrinq ISA extensions. This was a slightly earlier version of the patch here; what was actually queued reads: > RISC-V: Add Smcsrind and Sscsrind ISA extension CSR definitions > > From: Kaiwen Xue <[email protected]> > > This adds definitions of new CSRs and bits defined in the Smcsrind and > Sscsrind ISA extensions. - Paul