Re: [PATCH v8 09/22] RISC-V: Add Ssccfg/Smcdeleg ISA extension definition and parsing
Paul Walmsley <[email protected]> Tue, 4 Aug 2026 18:46:29 -0600 (MDT)
| Newsgroups | org.kernel.vger.linux-perf-users,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <[email protected]> |
This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1958216248-1785890790=:1383527 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT On Wed, 1 Jul 2026, Atish Patra wrote: > From: Atish Patra <[email protected]> > > Smcdeleg extension allows the M-mode to delegate selected counters > to S-mode so that it can access those counters and correpsonding > hpmevent CSRs without M-mode. > > Ssccfg (‘Ss’ for Privileged architecture and Supervisor-level > extension, ‘ccfg’ for Counter Configuration) provides access to > delegated counters and new supervisor-level state. > > This patch just enables these definitions and enable parsing. > > Signed-off-by: Atish Patra <[email protected]> Thanks, queued for v7.3. - Paul --8323329-1958216248-1785890790=:1383527--