Re: [PATCH 3/3] perf/x86/amd: Implement x86_pmu::print_debug

Petr Tesarik <[email protected]> Thu, 6 Aug 2026 17:44:08 +0200
Newsgroups org.kernel.vger.linux-perf-users,org.kernel.vger.linux-kernel
Message-ID <20260806174408.37b8e232@mordecai>
On Thu, 6 Aug 2026 15:33:28 +0530
Sandipan Das <[email protected]> wrote:

> Implement x86_pmu::print_debug for PerfMonV2 capable processors to dump
> MSR_AMD64_PERF_CNTR_GLOBAL_{CTL,STATUS}, plus MSR_AMD_DBG_EXTN_CFG if
> LBR Extension Version 2 is available. Chain into x86_pmu_print_debug()
> afterwards to dump the event selectors and counters.
> 
> MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_{CLR,SET} are left out since they are
> write-only.
> 
> Fixes: 21d59e3e2c40 ("perf/x86/amd/core: Detect PerfMonV2 support")
> Reported-by: Petr Tesarik <[email protected]>
> Closes: https://lore.kernel.org/all/[email protected]/
> Cc: [email protected]
> Signed-off-by: Sandipan Das <[email protected]>

This works great on my system, no more unchecked MSR access errors, and
the logged values look correct. Feel free to add

Tested-by: Petr Tesarik <[email protected]>

Thank you!

Petr T

> ---
>  arch/x86/events/amd/core.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
> index a787409f5a62..ecd648af81f7 100644
> --- a/arch/x86/events/amd/core.c
> +++ b/arch/x86/events/amd/core.c
> @@ -841,6 +841,25 @@ static void amd_pmu_v2_disable_all(void)
>  	amd_pmu_check_overflow();
>  }
>  
> +static void amd_pmu_v2_print_debug(int cpu)
> +{
> +	u64 ctrl, status, debugextn;
> +
> +	rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, ctrl);
> +	rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, status);
> +
> +	pr_info("\n");
> +	pr_info("CPU#%d: ctrl:       %016llx\n", cpu, ctrl);
> +	pr_info("CPU#%d: status:     %016llx\n", cpu, status);
> +
> +	if (cpu_feature_enabled(X86_FEATURE_AMD_LBR_V2)) {
> +		rdmsrq(MSR_AMD_DBG_EXTN_CFG, debugextn);
> +		pr_info("CPU#%d: debugextn:  %016llx\n", cpu, debugextn);
> +	}
> +
> +	x86_pmu_print_debug(cpu);
> +}
> +
>  DEFINE_STATIC_CALL_NULL(amd_pmu_branch_add, *x86_pmu.add);
>  
>  static void amd_pmu_add_event(struct perf_event *event)
> @@ -1452,6 +1471,7 @@ static int __init amd_core_pmu_init(void)
>  		x86_pmu.disable_all = amd_pmu_v2_disable_all;
>  		x86_pmu.enable = amd_pmu_v2_enable_event;
>  		x86_pmu.handle_irq = amd_pmu_v2_handle_irq;
> +		x86_pmu.print_debug = amd_pmu_v2_print_debug;
>  		static_call_update(amd_pmu_test_overflow, amd_pmu_test_overflow_status);
>  	}
>