Re: [Patch v3 0/8] perf/x86: Miscellaneous PMU bug fixes and optimizations
"Mi, Dapeng" <[email protected]>
| Newsgroups | org.kernel.vger.linux-perf-users,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Peter, Kindly ping. Could you please review this bug fixing patch series? The changes in this series suppose to be low risky. This series is a preceding patchset of the "Support SIMD/eGPRs/SSP registers sampling for perf" patch series. https://lore.kernel.org/all/[email protected]/ Thanks. On 7/17/2026 4:03 PM, Dapeng Mi wrote: > Changes since v2: > - Patch 6/8: Fix the typo in comments (Thomas). > - Patch 8/8: New patch which prevents drain_pebs() reentry. > > Changes since v1: > - Patch 3/7: Ensure cpuc->pmu is not the static pmu before calling > hybrid_pmu(cpuc->pmu) in intel_pmu_cpu_dead() (Sashiko). > > This series fixes recently found x86 core PMU bugs. Most of bugs are > found by Sashiko in reviewing the "Support SIMD/eGPRs/SSP registers > sampling for perf" patch-set, e.g., > https://lore.kernel.org/all/[email protected]/ > https://lore.kernel.org/all/[email protected]/ > > The patch 7/8 optimizes ACR handling in match_prev_assignment() and > mitigate the performance overhead. > > The patch 8/8 enhances intel_pmu_drain_pebs_buffer() to prevent > drain_pebs() reentry. > > Tests: > Below test cases are run on Diamonds and Novalake. No issues are found. > - Perf stat test > $ perf test 119 > - Perf record tests > $ perf test 155 > - Perf record LBR tests > $ perf test 156 > > History: > v2: https://lore.kernel.org/all/[email protected]/ > v1: https://lore.kernel.org/all/[email protected]/ > > Dapeng Mi (8): > perf/x86: Unregister PMI handler on PMU init failure > perf/x86: Free hybrid state on PMU init failure > perf/x86: Guard intel_pmu_cpu_dead() against invalid hybrid PMU casts > perf/x86/intel: Unwind cpuc state if PEBS buffer setup fails > perf/x86: Remove stale fixed counter helper and fix hybrid PMU access > perf/x86/intel: Fix intel_cap handling on hybrid PMUs > perf/x86: Optimize ACR handling in match_prev_assignment() > perf/x86/intel: Prevent drain_pebs() reentry > > arch/x86/events/core.c | 45 ++++++++++++---- > arch/x86/events/intel/core.c | 101 ++++++++++++++++++++++++++--------- > arch/x86/events/intel/ds.c | 7 --- > arch/x86/events/perf_event.h | 12 ++--- > 4 files changed, 113 insertions(+), 52 deletions(-) > > > base-commit: edda9051e267b7390c7ce24b1b71434414ad156e