Re: [Patch v2] perf/x86/intel: Prevent drain_pebs() reentry

[email protected]
Newsgroups org.kernel.vger.linux-perf-users
Message-ID <[email protected]>
> The PEBS buffer is shared by all events on a CPU, so drain_pebs() must
> not be reentered. If so, one instance may observe stale buffer state and
> potentially access out-of-bound memory.
> 
> Most invocations happen in NMI context, which naturally prevents reentry.
> However, drain_pebs() is also reachable from process context via
> intel_pmu_drain_pebs_buffer().
> 
> In those paths, the PMU is often already disabled, but not guaranteed.
> For example, __intel_pmu_pebs_disable() only disables the target counter,
> so other active counters can still raise a PMI and interrupt an in-flight
> drain_pebs(). Here is an example,
> 
> __perf_addr_filters_adjust()
>   perf_event_stop()
> [ ... ]
> 
> Also add a warning in intel_pmu_drain_pebs_buffer() when the full PMU is
> not disabled.
> 
> Signed-off-by: Dapeng Mi <[email protected]>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.