Re: [PATCH v5 04/13] clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
Sreeshankar K <[email protected]>
| Newsgroups | org.kernel.vger.linux-pm,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <CAA-+ukJT1=RYfTFsRvkTsN+Yca5yhgS+1xS=Gb1HmFWaSQM2Sg@mail.gmail.com> |
Thanks for the review. Missed that, I apologize. I will send a v6 patchset with everything fixed. Thanks, Sreeshankar K On Mon, 24 Aug 2026 at 19:21, Abel Vesa <[email protected]> wrote: > > On 26-08-24 13:04:28, Sreeshankar K wrote: > > Add support for the global clock controller found on SM7250 > > based devices. This should allow most non-multimedia device > > drivers to probe and control their clocks. > > > > Signed-off-by: Sreeshankar K <[email protected]> > > --- > > drivers/clk/qcom/Kconfig | 9 + > > drivers/clk/qcom/Makefile | 1 + > > drivers/clk/qcom/gcc-sm7250.c | 2275 +++++++++++++++++++++++++++++++++ > > 3 files changed, 2285 insertions(+) > > create mode 100644 drivers/clk/qcom/gcc-sm7250.c > > [...] > > > diff --git a/drivers/clk/qcom/gcc-sm7250.c b/drivers/clk/qcom/gcc-sm7250.c > > new file mode 100644 > > index 000000000..bf75c8ec1 > > --- /dev/null > > +++ b/drivers/clk/qcom/gcc-sm7250.c > > @@ -0,0 +1,2275 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +/* > > + * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. > > + * Copyright (c) 2026, Sreeshankar K <[email protected]> > > + */ > > + > > + > > [...] > > > +static struct clk_alpha_pll gpll0 = { > > + .offset = 0x0, > > + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID], > > + .clkr = { > > + .enable_reg = 0x52010, > > + .enable_mask = BIT(0), > > + .hw.init = &(struct clk_init_data){ > > You missed my other comment from v4. > > const here and everywhere else. > > It is always a good practice to compare to other (older) drivers from > upstream. > > > + .name = "gpll0", > > + .parent_data = &(const struct clk_parent_data){ > > + .index = DT_BI_TCXO, > > + }, > > + .num_parents = 1, > > + .ops = &clk_alpha_pll_fixed_lucid_ops, > > + }, > > + }, > > +}; > > + > > [...]