Re: [PATCH v20 1/3] dt-bindings: pwm: opencores: Update compatibles, examples and maintainers
Conor Dooley <[email protected]>
| Newsgroups | org.kernel.vger.linux-pwm,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <20260630-footpad-barbed-2415fb3acd5c@spud> |
On Tue, Jun 30, 2026 at 01:15:09AM +0000, Hal Feng wrote: > > On 26.06.29 23:00, Conor Dooley wrote: > > On Mon, Jun 29, 2026 at 02:35:59PM +0800, Hal Feng wrote: > > > Remove the jh8100 compatible since the JH8100 SoC has been canceled > > > and will not be released. Add the jhb100 compatible to replace it. > > > > > > Change the register size in examples to 0x10, since an OpenCores PTC > > > IP has only 4 32-bit registers: CNTR, HRC, LRC and CTRL. > > > > Actually, please also add a fixes tag to the original commit adding the binding. > > OK. Will add it in the next version. Thanks. If this version is up to scratch on the driver front, providing one in a reply here will probably suffice.
signature.asc
(application/pgp-signature, 228 B)
-----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCakOThAAKCRB4tDGHoIJi 0pGDAP0V84v0E0JF11z4iKvk1U9IU4AGvM9YLUuWPTFAiaNNBwD7BJTuPKX9SsUT AMmioCQOnL6t08Nvm8frfHvjzxL7VwQ= =konP -----END PGP SIGNATURE-----