Re: [PATCH v12 4/4] dt-bindings: timer: dwc: Update resets property items
Krzysztof Kozlowski <[email protected]> Fri, 24 Jul 2026 07:54:08 +0200
| Newsgroups | org.kernel.vger.linux-pwm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <20260724-ambrosial-groovy-anteater-c2b349@quoll> |
On Tue, Jul 21, 2026 at 08:09:35PM +0800, [email protected] wrote: > From: Xuyang Dong <[email protected]> > > The DesignWare DW_apb_timers IP has two active-low reset inputs: > presetn resets the register interface logic in the pclk (bus) domain, > and timer_N_resetn resets the counter/timer logic in the timer_N_clk > domain. The existing snps,dw-apb-timer binding only describes one. > > Update snps,dw-apb-timer binding to allow up to two reset lines, > matching the hardware capabilities of the DesignWare IP family. > > Signed-off-by: Xuyang Dong <[email protected]> > --- > .../devicetree/bindings/timer/snps,dw-apb-timer.yaml | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) Acked-by: Krzysztof Kozlowski <[email protected]> Best regards, Krzysztof