Re: [PATCH v13 1/5] dt-bindings: pwm: dwc: Document optional resets property

Krzysztof Kozlowski <[email protected]> Sat, 25 Jul 2026 17:05:05 +0200

Newsgroups	org.kernel.vger.linux-pwm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID	<20260725-spectacular-vigorous-sambar-5cc0bc@quoll>

On Fri, Jul 24, 2026 at 04:43:04PM +0800, [email protected] wrote:
> From: Xuyang Dong <[email protected]>
> 
> The DesignWare PWM IP has two active-low reset inputs: presetn resets
> the register interface logic in the pclk (bus) domain, and
> timer_N_resetn resets the counter/timer logic in the timer_N_clk
> domain. The existing snps,dw-apb-timers-pwm2 binding does not
> describe either of these lines.
> 
> Add the resets property and describe the function of each reset to
> support future use of resets. Add the reset-names property to allow
> independent control of the two reset signals.
> 
> Signed-off-by: Xuyang Dong <[email protected]>
> ---
>  .../bindings/pwm/snps,dw-apb-timers-pwm2.yaml          | 10 ++++++++++
>  1 file changed, 10 insertions(+)

Reviewed-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof