Re: [PATCH 1/2] arm64: dts: renesas: r9a09g057: Add PCIe nodes

Hi Geert,

Thank you for the review.

On Wed, Jul 1, 2026 at 3:08 PM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Prabhakar,
>
> On Tue, 2 Jun 2026 at 22:47, Prabhakar <[email protected]> wrote:
> > From: Lad Prabhakar <[email protected]>
> >
> > Add PCIe nodes to Renesas RZ/V2H(P) ("R9A09G057") SoC DTSI.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > @@ -1025,6 +1025,146 @@ rsci9: serial@12803000 {
> >                         status = "disabled";
> >                 };
> >
> > +               pcie0: pcie@13400000 {
> > +                       compatible = "renesas,r9a09g057-pcie";
> > +                       reg = <0 0x13400000 0 0x10000>;
> > +                       ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
>
> (kast cell) 0x08000000, for better alignment with the next line?
>
Agreed (and below)

> > +                                <0x43000000 4 0x40000000 4 0x40000000 6 0x00000000>;
> > +                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 4 0x00000000>;
>
> Sashiko wonders if the first cell should be 0x43000000, as the window
> is 16 GiB large, i.e. larger than 4 GiB.  I don't know...
Agreed; this needs to be 0x43000000 since we can access beyond 4GiB.
The driver currently has GFP_DMA flag for __get_free_pages() and we
need dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));  I'll
preprare driver changes for it. and send v2 for this fixing your
review comments.

> If Sashiko is right:
>   - RZ/G3E is also wrong.
I will fix it.

>   - Should there be a second line for the 32-bit window, covering all
>     low 4 GiB RAM?
>
It's not needed; the driver handles it internally, as seen in the logs below.

[    1.849811] rzg3s-pcie-host 13400000.pcie: host bridge
/soc/pcie@13400000 ranges:
[    1.857545] rzg3s-pcie-host 13400000.pcie:      MEM
0x0030000000..0x0037ffffff -> 0x0030000000
[    1.872114] rzg3s-pcie-host 13400000.pcie:      MEM
0x0440000000..0x0a3fffffff -> 0x0440000000
[    1.880920] rzg3s-pcie-host 13400000.pcie:   IB MEM
0x0040000000..0x043fffffff -> 0x0040000000
[    1.896393] Setting inbound window 0: CPU 0x40000000, PCI
0x40000000, size 0x40000000
[    1.904323] Setting inbound window 1: CPU 0x80000000, PCI
0x80000000, size 0x80000000
[    1.922267] Setting inbound window 2: CPU 0x100000000, PCI
0x100000000, size 0x100000000
[    1.930407] Setting inbound window 3: CPU 0x200000000, PCI
0x200000000, size 0x200000000
[    1.938533] Setting inbound window 4: CPU 0x400000000, PCI
0x400000000, size 0x40000000

Cheers,
Prabhakar

> > +               pcie1: pcie@13410000 {
> > +                       compatible = "renesas,r9a09g057-pcie";
> > +                       reg = <0 0x13410000 0 0x10000>;
> > +                       ranges = <0x02000000 0 0x38000000 0 0x38000000 0 0x8000000>,
>
> 0x0 and 0x080000000, for better alignment with the next line?
>
> > +                                <0x43000000 0xa 0x40000000 0xa 0x40000000 5 0xc0000000>;
> > +                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 4 0x00000000>;
>
> Same as above.
>
> The rest LGTM.
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds