Re: [PATCH v2 1/8] clk: r9a08g045-cpg: Add clocks and resets for CAN-FD
Geert Uytterhoeven <[email protected]>
| Newsgroups | org.kernel.vger.linux-renesas-soc,org.kernel.vger.linux-can,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree |
|---|---|
| Message-ID | <CAMuHMdUGKQAuLJ-Vo7=O8E=kMCYiUZ2H=Be9T3PAkjHu+PRqhQ@mail.gmail.com> |
Hi Claudiu, On Thu, 9 Jul 2026 at 20:23, Claudiu Beznea <[email protected]> wrote: > From: Claudiu Beznea <[email protected]> > > Renesas RZ/G3S SoC has a CAN-FD IP. Add clocks and resets for it. > > Reviewed-by: Biju Das <[email protected]> > Reviewed-by: Geert Uytterhoeven <[email protected]> > Signed-off-by: Claudiu Beznea <[email protected]> > --- > > Changes in v2: > - used R9A08G045_CLK_P4 ID for P4 clock > - still collected the tags; Biju, Geert, please let me know if you consider > otherwise Thanks, will queue this one instead of v1 in renesas-clk for v7.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds