[PATCH v5 9/9] arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 support
Biju <[email protected]> Wed, 29 Jul 2026 12:50:17 +0100
| Newsgroups | org.kernel.vger.linux-renesas-soc,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Biju Das <[email protected]> Enable USB2.0 on the RZ/G3L SMARC board (r9a08g046l48-smarc). Port 0 (ehci0, ohci0, usb2_phy0) is configured as OTG with usb0_pins pinmux (USB20_OVRCUR, USB20_VBUSEN) and usb0_vbus_otg as the VBUS supply. Port 1 (ehci1, ohci1, usb2_phy1) is configured as host-only with usb1_pins pinmux (USB21_OVRCUR, USB21_VBUSEN), usb1_vbus_otg as the VBUS supply, and renesas,no-otg-pins set to indicate no OTG pin routing. The phyrst USB PHY reset controller is also enabled. Signed-off-by: Biju Das <[email protected]> --- v4->v5: * No change. v3->v4: * No change. v2->v3: * No change. v1->v2: * Updated commit description. --- .../boot/dts/renesas/r9a08g046l48-smarc.dts | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts index 96cc7ee46a6a..b189ae8e808d 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts @@ -87,6 +87,16 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd { #endif }; +&ehci0 { + dr_mode = "otg"; + status = "okay"; +}; + +&ehci1 { + dr_mode = "host"; + status = "okay"; +}; + &i2c2 { pinctrl-0 = <&i2c2_pins>; pinctrl-names = "default"; @@ -138,6 +148,20 @@ &keys { #endif }; +&ohci0 { + dr_mode = "otg"; + status = "okay"; +}; + +&ohci1 { + dr_mode = "host"; + status = "okay"; +}; + +&phyrst { + status = "okay"; +}; + &pinctrl { audio_clk_pins: audio-clock { pinmux = <RZG3L_PORT_PINMUX(H, 4, 6)>, /* AUDIO_CLK_B */ @@ -259,6 +283,16 @@ ssi0_pins: ssi0 { <RZG3L_PORT_PINMUX(H, 2, 9)>, /* SSIF0_RCK */ <RZG3L_PORT_PINMUX(H, 3, 9)>; /* SSIF0_TXD */ }; + + usb0_pins: usb0 { + pinmux = <RZG3L_PORT_PINMUX(3, 0, 12)>, /* USB20_OVRCUR */ + <RZG3L_PORT_PINMUX(3, 1, 12)>; /* USB20_VBUSEN */ + }; + + usb1_pins: usb1 { + pinmux = <RZG3L_PORT_PINMUX(3, 4, 12)>, /* USB21_OVRCUR */ + <RZG3L_PORT_PINMUX(3, 5, 12)>; /* USB21_VBUSEN */ + }; }; #if SW_SER0_PMOD @@ -330,3 +364,18 @@ &ssi0 { status = "okay"; }; #endif + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + vbus-supply = <&usb0_vbus_otg>; + status = "okay"; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + vbus-supply = <&usb1_vbus_otg>; + renesas,no-otg-pins; + status = "okay"; +}; -- 2.43.0