[PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes
Biju <[email protected]>
| Newsgroups | org.kernel.vger.linux-renesas-soc,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Biju Das <[email protected]> Add USB2.0 function device nodes to the RZ/G3L (r9a08g046) SoC DTSI. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> --- v7: * Moved the patch from [1] * Collected the tag. [1] https://lore.kernel.org/all/[email protected]/ --- arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi index bf0dbac66d14..08d919470830 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi @@ -1302,6 +1302,44 @@ usb2_phy1: usb-phy@11e90200 { status = "disabled"; }; + hsusb0: usb@11e30000 { + compatible = "renesas,usbhs-r9a08g046", + "renesas,rzg2l-usbhs"; + reg = <0 0x11e30000 0 0x10000>; + interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2P0_EXR_CPUCLK>; + resets = <&phyrst 0>, + <&cpg R9A08G046_USB_U2P0_EXL_SYSRST>; + renesas,buswait = <7>; + phys = <&usb2_phy0 3>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + hsusb1: usb@11eb0000 { + compatible = "renesas,usbhs-r9a08g046", + "renesas,rzg2l-usbhs"; + reg = <0 0x11eb0000 0 0x10000>; + interrupts = <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2P1_EXR_CPUCLK>; + resets = <&phyrst 1>, + <&cpg R9A08G046_USB_U2P1_EXL_SYSRST>; + renesas,buswait = <7>; + phys = <&usb2_phy1 3>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + pcie: pcie@11e40000 { reg = <0 0x11e40000 0 0x10000>; ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>; -- 2.43.0