[PATCH 1/3] arm64: dts: renesas: r9a08g046: Add USB2.0 placeholder nodes
Tommaso Merciai <[email protected]>
| Newsgroups | org.kernel.vger.linux-renesas-soc,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <aec1fce5558c6c88725fe710a2f9e4b1eb9e8d64.1787062965.git.tommaso.merciai.xr@bp.renesas.com> |
The USB2.0 wiring on the RZ SMARC Carrier-II board is the same for the RZ/G3E and RZ/G3L SoMs, so the nodes belong in the shared renesas-smarc2.dtsi. Enabling them there breaks the RZ/G3L SMARC EVK build, as the r9a08g046 (RZ/G3L) SoC DTSI describes neither the USB2.0 host (OHCI/EHCI) nor function (HSUSB) instances: Error: arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi:94.1-7 Label or path ehci0 not found Error: arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi:99.1-7 Label or path ehci1 not found Error: arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi:104.1-8 Label or path hsusb0 not found Error: arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi:114.1-7 Label or path ohci0 not found Error: arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi:119.1-7 Label or path ohci1 not found Add minimal placeholder nodes carrying only the reg property. The remaining properties will be filled in once USB2.0 support for RZ/G3L is complete. Signed-off-by: Tommaso Merciai <[email protected]> --- arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi index c63a857f0e5b..5951a68c981c 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi @@ -1001,6 +1001,31 @@ queue3 { }; }; + ohci0: usb@11e10000 { + reg = <0 0x11e10000 0 0x100>; + /* placeholder */ + }; + + ohci1: usb@11e90000 { + reg = <0 0x11e90000 0 0x100>; + /* placeholder */ + }; + + ehci0: usb@11e10100 { + reg = <0 0x11e10100 0 0x100>; + /* placeholder */ + }; + + ehci1: usb@11e90100 { + reg = <0 0x11e90100 0 0x100>; + /* placeholder */ + }; + + hsusb0: usb@11e30000 { + reg = <0 0x11e30000 0 0x10000>; + /* placeholder */ + }; + pcie: pcie@11e40000 { reg = <0 0x11e40000 0 0x10000>; ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>; -- 2.54.0