[PATCH v7 1/9] pwm: rzg2l-gpt: Fix macro used for period/duty cycle conversion
Biju <[email protected]>
| Newsgroups | org.kernel.vger.linux-renesas-soc,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pwm |
|---|---|
| Message-ID | <[email protected]> |
From: Biju Das <[email protected]> The driver converts state->period and state->duty_cycle (both in nanoseconds) into timer ticks by multiplying with rate_khz and dividing by USEC_PER_SEC. Since rate_khz is expressed in kHz (cycles per millisecond), the correct divisor is NSEC_PER_MSEC, not USEC_PER_SEC. Both constants evaluate to 1000000, so this is a readability/correctness fix with no functional change, and it keeps the calculation's units self-consistent with the comment describing the overflow bound. Update rzg2l_gpt_calculate_period_or_duty() and rzg2l_gpt_config() accordingly. Cc: [email protected] Fixes: 061f087f5d0b ("pwm: Add support for RZ/G2L GPT") Signed-off-by: Biju Das <[email protected]> --- v7: * New patch. --- drivers/pwm/pwm-rzg2l-gpt.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index 1569f3ba8c53..108fa99f832d 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -208,13 +208,13 @@ static u64 rzg2l_gpt_calculate_period_or_duty(struct rzg2l_gpt_chip *rzg2l_gpt, /* * The calculation doesn't overflow an u64 because prescale ≤ 5 and so - * tmp = val << (2 * prescale) * USEC_PER_SEC + * tmp = val << (2 * prescale) * NSEC_PER_MSEC * < 2^32 * 2^10 * 10^6 * < 2^32 * 2^10 * 2^20 * = 2^62 */ tmp = (u64)val << (2 * prescale); - tmp *= USEC_PER_SEC; + tmp *= NSEC_PER_MSEC; return DIV64_U64_ROUND_UP(tmp, rzg2l_gpt->rate_khz); } @@ -266,7 +266,7 @@ static int rzg2l_gpt_config(struct pwm_chip *chip, struct pwm_device *pwm, u8 prescale; /* Limit period/duty cycle to max value supported by the HW */ - period_ticks = mul_u64_u64_div_u64(state->period, rzg2l_gpt->rate_khz, USEC_PER_SEC); + period_ticks = mul_u64_u64_div_u64(state->period, rzg2l_gpt->rate_khz, NSEC_PER_MSEC); if (period_ticks > RZG2L_MAX_TICKS) period_ticks = RZG2L_MAX_TICKS; /* @@ -288,7 +288,7 @@ static int rzg2l_gpt_config(struct pwm_chip *chip, struct pwm_device *pwm, prescale = rzg2l_gpt_calculate_prescale(period_ticks); pv = rzg2l_gpt_calculate_pv_or_dc(period_ticks, prescale); - duty_ticks = mul_u64_u64_div_u64(state->duty_cycle, rzg2l_gpt->rate_khz, USEC_PER_SEC); + duty_ticks = mul_u64_u64_div_u64(state->duty_cycle, rzg2l_gpt->rate_khz, NSEC_PER_MSEC); if (duty_ticks > period_ticks) duty_ticks = period_ticks; dc = rzg2l_gpt_calculate_pv_or_dc(duty_ticks, prescale); -- 2.43.0