Re: [PATCH v6 3/4] clk: sunxi-ng: sun6i-rtc: split main oscillator div and gate
[email protected] Wed, 22 Jul 2026 14:57:59 +0000
| Newsgroups | org.kernel.vger.linux-rtc,dev.linux.lists.linux-sunxi,org.kernel.vger.linux-devicetree |
|---|---|
| Message-ID | <[email protected]> |
> On the a733 the "osc24M-32k" clock has the same gate bits as the previously > supported SoC but a different divider implementation. > > Instead of a fixed 750 divider, the divider is selected based on the > rate of the oscillator. It can be seen as a simple read-only divider. > > On the A733 the gate and the divider are on different register which is > not supported by sunxi combined clocks. These element will be split on the > A733. Split them for the older SoC as well to keep on sharing the gate > definition. > > Reviewed-by: Chen-Yu Tsai <[email protected]> > Signed-off-by: Jerome Brunet <[email protected]> Sashiko has reviewed this patch and found no issues. It looks great! -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=3