Re: [PATCH v7 3/4] clk: sunxi-ng: sun6i-rtc: split main oscillator div and gate
[email protected] Thu, 23 Jul 2026 09:49:39 +0000
| Newsgroups | org.kernel.vger.linux-rtc,dev.linux.lists.linux-sunxi,org.kernel.vger.linux-devicetree |
|---|---|
| Message-ID | <[email protected]> |
> On the a733 the "osc24M-32k" clock has the same gate bits as the previous= ly > supported SoC but a different divider implementation. >=20 > Instead of a fixed 750 divider, the divider is selected based on the > rate of the oscillator. It can be seen as a simple read-only divider. >=20 > On the A733 the gate and the divider are on different register which is > not supported by sunxi combined clocks. These element will be split on the > A733. Split them for the older SoC as well to keep on sharing the gate > definition. >=20 > Reviewed-by: Chen-Yu Tsai <[email protected]> > Signed-off-by: Jerome Brunet <[email protected]> Sashiko has reviewed this patch and found no issues. It looks great! --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20260723-a733-rtc-v= [email protected]?part=3D3