[PATCH v16 09/20] target/s390x: Support AES CBC for cpacf kmc instruction
Harald Freudenberger <[email protected]>
| Newsgroups | org.kernel.vger.linux-s390,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Support the subfunctions CPACF_KMC_AES_128, CPACF_KMC_AES_192 and CPACF_KMC_AES_256 for the cpacf kmc instruction. Signed-off-by: Harald Freudenberger <[email protected]> Tested-by: Holger Dengler <[email protected]> Reviewed-by: Finn Callies <[email protected]> Reviewed-by: Ilya Leoshkevich <[email protected]> --- target/s390x/gen-features.c | 3 ++ target/s390x/tcg/cpacf.h | 4 ++ target/s390x/tcg/cpacf_aes.c | 91 ++++++++++++++++++++++++++++++++ target/s390x/tcg/crypto_helper.c | 24 +++++++++ 4 files changed, 122 insertions(+) diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index c8ba5107d7..2dacc65995 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -925,6 +925,9 @@ static uint16_t qemu_MAX[] = { S390_FEAT_KM_AES_128, S390_FEAT_KM_AES_192, S390_FEAT_KM_AES_256, + S390_FEAT_KMC_AES_128, + S390_FEAT_KMC_AES_192, + S390_FEAT_KMC_AES_256, }; /****** END FEATURE DEFS ******/ diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h index 49630bab5e..7dde122879 100644 --- a/target/s390x/tcg/cpacf.h +++ b/target/s390x/tcg/cpacf.h @@ -23,5 +23,9 @@ int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra, uint64_t param_addr, uint64_t *dst_ptr_reg, uint64_t *src_ptr_reg, uint64_t *src_len_reg, uint32_t type, uint8_t fc, uint8_t mod); +int cpacf_aes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra, + uint64_t param_addr, uint64_t *dst_ptr_reg, + uint64_t *src_ptr_reg, uint64_t *src_len_reg, + uint32_t type, uint8_t fc, uint8_t mod); #endif /* S390X_CPACF_H */ diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c index d87da18c19..c937514e9b 100644 --- a/target/s390x/tcg/cpacf_aes.c +++ b/target/s390x/tcg/cpacf_aes.c @@ -135,3 +135,94 @@ int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra, return !len ? 0 : 3; } + +int cpacf_aes_cbc(CPUS390XState *env, const int mmu_idx, uintptr_t ra, + uint64_t param_addr, uint64_t *dst_ptr_reg, + uint64_t *src_ptr_reg, uint64_t *src_len_reg, + uint32_t type, uint8_t fc, uint8_t mod) +{ + enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE }; + uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE]; + uint64_t len = *src_len_reg, done = 0; + uint8_t key[32], iv[AES_BLOCK_SIZE]; + int i, keysize, addr_reg_size; + AES_KEY exkey; + + g_assert(type == S390_FEAT_TYPE_KMC); + + switch (fc) { + case CPACF_KMC_AES_128: + keysize = 16; + break; + case CPACF_KMC_AES_192: + keysize = 24; + break; + case CPACF_KMC_AES_256: + keysize = 32; + break; + default: + g_assert_not_reached(); + } + + /* check addressing mode, raise exception if not supported here */ + addr_reg_size = get_address_bitsize(env); + switch (addr_reg_size) { + case 64: + break; + case 32: + len = (uint32_t)len; + break; + default: + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); + } + + /* early bail out if length is zero */ + if (!len) { + return 0; + } + + /* length has to be properly aligned. */ + if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) { + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); + } + + /* fetch iv from param block */ + read_guest_wrap_u8(env, mmu_idx, ra, param_addr, iv, AES_BLOCK_SIZE); + + /* fetch key from param block */ + read_guest_wrap_u8(env, mmu_idx, ra, + param_addr + AES_BLOCK_SIZE, key, keysize); + + /* expand key */ + if (mod) { + AES_set_decrypt_key(key, keysize * 8, &exkey); + } else { + AES_set_encrypt_key(key, keysize * 8, &exkey); + } + + /* process up to MAX_BLOCKS_PER_RUN aes blocks */ + for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) { + aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in); + if (mod) { + /* decrypt in => out */ + AES_cbc_decrypt(in, out, iv, &exkey); + } else { + /* encrypt in => out */ + AES_cbc_encrypt(in, out, iv, &exkey); + } + aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out); + len -= AES_BLOCK_SIZE; + done += AES_BLOCK_SIZE; + } + + /* update iv in param block */ + write_guest_wrap_u8(env, mmu_idx, ra, param_addr, iv, AES_BLOCK_SIZE); + + *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size, + *src_ptr_reg + done); + *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size, + *dst_ptr_reg + done); + *src_len_reg -= done; + + return !len ? 0 : 3; +} diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c index 534498173c..7368c25e5d 100644 --- a/target/s390x/tcg/crypto_helper.c +++ b/target/s390x/tcg/crypto_helper.c @@ -119,6 +119,27 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra, return rc; } +static int cpacf_kmc(CPUS390XState *env, const int mmu_idx, uintptr_t ra, + uint32_t r1, uint32_t r2, uint32_t r3, + uint8_t fc, uint8_t mod) +{ + int rc = 0; + + switch (fc) { + case CPACF_KMC_AES_128: + case CPACF_KMC_AES_192: + case CPACF_KMC_AES_256: + rc = cpacf_aes_cbc(env, mmu_idx, ra, env->regs[1], + &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1], + S390_FEAT_TYPE_KMC, fc, mod); + break; + default: + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); + } + + return rc; +} + static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra, uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc) { @@ -190,6 +211,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_KM: rc = cpacf_km(env, mmu_idx, ra, r1, r2, r3, fc, mod); break; + case S390_FEAT_TYPE_KMC: + rc = cpacf_kmc(env, mmu_idx, ra, r1, r2, r3, fc, mod); + break; case S390_FEAT_TYPE_PPNO: rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc); break; -- 2.43.0