[PATCH 08/13] dt-bindings: clock: exynos8855: add hsi clock definitions
"raghav.s" <[email protected]> Tue, 28 Jul 2026 17:41:06 +0530
| Newsgroups | org.kernel.vger.linux-samsung-soc,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add device tree clock binding definitions for CMU_HSI Signed-off-by: raghav.s <[email protected]> --- .../clock/samsung,exynos8855-clock.yaml | 21 +++++++++++++++++++ .../dt-bindings/clock/samsung,exynos8855.h | 10 +++++++++ 2 files changed, 31 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml index 62277c67fec1..e97b65f8be5f 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos8855-clock.yaml @@ -28,6 +28,7 @@ description: | properties: compatible: enum: + - samsung,exynos8855-cmu-hsi - samsung,exynos8855-cmu-peric - samsung,exynos8855-cmu-peris - samsung,exynos8855-cmu-top @@ -47,6 +48,26 @@ properties: maxItems: 1 allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos8855-cmu-hsi + + then: + properties: + clocks: + items: + - description: External reference clock (76.8 MHz) + - description: CMU_HSI NOC clock (from CMU_TOP) + - description: CMU_HSI UFS_EMBD clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: ufs_embd + - if: properties: compatible: diff --git a/include/dt-bindings/clock/samsung,exynos8855.h b/include/dt-bindings/clock/samsung,exynos8855.h index 9efaf3e330b4..44484a9d67f5 100644 --- a/include/dt-bindings/clock/samsung,exynos8855.h +++ b/include/dt-bindings/clock/samsung,exynos8855.h @@ -55,6 +55,10 @@ #define CLKCMU_DOUT_PERIS_GIC 43 #define CLKCMU_DOUT_PERIS_NOC 44 #define FOUT_MMC_PLL_CLKOUT_DIV2 45 +#define CLKCMU_MOUT_HSI_NOC 46 +#define CLKCMU_MOUT_HSI_UFS_EMBD 47 +#define CLKCMU_DOUT_HSI_NOC 48 +#define CLKCMU_DOUT_HSI_UFS_EMBD 49 /* CMU_PERIC */ #define CLK_MOUT_PERIC_IP_USER 1 @@ -95,4 +99,10 @@ #define CLK_GOUT_WDT0_PERIS_IPCLKPORT_PCLK 8 #define CLK_GOUT_WDT1_PERIS_IPCLKPORT_PCLK 9 +/* CMU_HSI */ +#define CLK_MOUT_HSI_NOC_USER 1 +#define CLK_MOUT_HSI_UFS_EMBD_USER 2 +#define CLK_GOUT_CMU_HSI_IPCLKPORT_PCLK 3 +#define CLK_GOUT_SYSREG_HSI_IPCLKPORT_PCLK 4 + #endif /* _DT_BINDINGS_CLOCK_EXYNOS8855_H */ -- 2.34.1