[PATCH 06/10] dt-bindings: ufs: Add compatibles for S32N79 Host Controller platform driver
Larisa Grigore <[email protected]>
| Newsgroups | org.kernel.vger.linux-scsi,dev.linux.lists.imx,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Document the device tree binding for the NXP S32N79 DWC-based UFS host controller which is compliant with JESD-223D "Universal Flash Storage Host Controller Interface" v3.0. The controller requires access to the SCM register block and the core clock rate when M-PHY initialization is performed. Add the optional nxp,mphy-boot-mode property to select the M-PHY firmware execution environment. Currently, the M-PHY firmware can only run from ROM. If the property is omitted, M-PHY initialization is assumed to be handled externally. Signed-off-by: Larisa Grigore <[email protected]> --- .../bindings/ufs/nxp,s32n7-ufshc.yaml | 99 +++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/nxp,s32n7-ufshc.yaml diff --git a/Documentation/devicetree/bindings/ufs/nxp,s32n7-ufshc.yaml b/Documentation/devicetree/bindings/ufs/nxp,s32n7-ufshc.yaml new file mode 100644 index 000000000000..d9d5669be313 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/nxp,s32n7-ufshc.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/nxp,s32n7-ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32N79 Universal Flash Storage (UFS) Controller + +maintainers: + - Larisa Grigore <[email protected]> + +# Select only our matches, not all jedec,ufs +select: + properties: + compatible: + contains: + const: nxp,s32n79-ufshc + required: + - compatible + +properties: + compatible: + items: + - const: nxp,s32n79-ufshc + - const: jedec,ufs-3.0 + + reg: + minItems: 1 + items: + - description: UFS Host Controller registers + - description: System Control Module registers + + reg-names: + description: | + Names for the register regions. The first entry must be "ufshc". + The second entry "scm" is mandatory only when nxp,mphy-boot-mode + property is present. + minItems: 1 + items: + - const: ufshc + - const: scm + + clocks: + maxItems: 1 + description: UFS core clock + + clock-names: + items: + - const: core_clk + + nxp,mphy-boot-mode: + description: | + MPHY initialization mode. Defines how the MPHY firmware should be + initialized and executed during UFS controller startup. + If this property is not specified, MPHY initialization will be skipped. + $ref: /schemas/types.yaml#/definitions/string + enum: + - rom + +required: + - compatible + - reg + +allOf: + - $ref: ufs-common.yaml + - if: + required: + - nxp,mphy-boot-mode + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + required: + - reg-names + - clocks + - clock-names + else: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + +unevaluatedProperties: false + +examples: + - | + ufshc@4ac80000 { + compatible = "nxp,s32n79-ufshc", "jedec,ufs-3.0"; + reg = <0x4ac80000 0x1000>, <0x4ac40000 0x1000>; + reg-names = "ufshc", "scm"; + interrupt-parent = <&irqsteer_coss>; + interrupts = <211>; + clocks = <&sys_clk>; + clock-names = "core_clk"; + nxp,mphy-boot-mode = "rom"; + }; -- 2.43.0