[PATCH 08/10] arm64: dts: freescale: s32n79: Add UFS host controller
Larisa Grigore <[email protected]>
| Newsgroups | org.kernel.vger.linux-scsi,dev.linux.lists.imx,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add the S32N79 UFS host controller node to the SoC dtsi, including the UFSHC register region and the SCM region required for M-PHY initialization. The controller remains disabled by default and is enabled by board dts files as needed. Signed-off-by: Larisa Grigore <[email protected]> --- arch/arm64/boot/dts/freescale/s32n79.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/s32n79.dtsi b/arch/arm64/boot/dts/freescale/s32n79.dtsi index 94ab58783fdc..5b92eaea05fb 100644 --- a/arch/arm64/boot/dts/freescale/s32n79.dtsi +++ b/arch/arm64/boot/dts/freescale/s32n79.dtsi @@ -100,6 +100,17 @@ uart7: serial@4aa40000 { status = "disabled"; }; + ufshc: ufs@4ac80000 { + compatible = "nxp,s32n79-ufshc", "jedec,ufs-3.0"; + reg = <0x4ac80000 0x1000>, <0x4ac40000 0x1000>; + reg-names = "ufshc", "scm"; + interrupt-parent = <&irqsteer_coss>; + interrupts = <211>; + clocks = <&clks 0x92>; + clock-names = "core_clk"; + status = "disabled"; + }; + irqsteer_coss: interrupt-controller@4ed00000 { compatible = "nxp,s32n79-irqsteer"; reg = <0x4ed00000 0x10000>; -- 2.43.0