Re: [PATCH v5 05/14] serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware
Andy Shevchenko <[email protected]> Sun, 2 Aug 2026 12:00:53 +0300
| Newsgroups | org.kernel.vger.linux-serial,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <CAHp75VfviLtGzGX25j_-xzPtrRQgF7kpCAP2pcvQOjUWM3ZVDA@mail.gmail.com> |
On Fri, Jul 31, 2026 at 10:49=E2=80=AFAM Crescent Hsieh <[email protected]> wrote: > > The MUEx50 UART can handle in-band software flow control (XON/XOFF) > directly in hardware. > > Program the on-chip XON/XOFF characters from termios settings and enable > the corresponding MUEx50 flow control modes when IXON or IXOFF is > requested. Provide throttle and unthrottle callbacks so RX can be > stopped and resumed cleanly. ... > #define MOXA_PUART_EFR_AUTO_RTS BIT(6) > #define MOXA_PUART_EFR_AUTO_CTS BIT(7) > #define MOXA_PUART_EFR_RX_FLOW_MASK GENMASK(1, 0) > +#define MOXA_PUART_EFR_RX_FLOW_DISABLED 0x0 > +#define MOXA_PUART_EFR_RX_FLOW_XON2_XOFF2 0x1 > +#define MOXA_PUART_EFR_RX_FLOW_XON1_XOFF1 0x2 > +#define MOXA_PUART_EFR_RX_FLOW_COPY_TX 0x3 > #define MOXA_PUART_EFR_TX_FLOW_MASK GENMASK(3, 2) > - ^^^ > +#define MOXA_PUART_EFR_TX_FLOW_DISABLED 0x0 > +#define MOXA_PUART_EFR_TX_FLOW_XON2_XOFF2 0x1 > +#define MOXA_PUART_EFR_TX_FLOW_XON1_XOFF1 0x2 > +#define MOXA_PUART_EFR_TX_FLOW_RESERVED 0x3 > + ^^^ Why is this blank line changed? What happened? > +#define MOXA_PUART_XON1 0x0B > +#define MOXA_PUART_XON2 0x0C > +#define MOXA_PUART_XOFF1 0x0D > +#define MOXA_PUART_XOFF2 0x0E --=20 With Best Regards, Andy Shevchenko