Re: [PATCH v4 2/2] spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller support

Mark Brown 於 2026/7/30 下午 11:11 寫道:
> On Mon, Jul 27, 2026 at 05:18:33PM +0800, Chi-Wen Weng wrote:
>
>> Add SPI controller driver support for the Quad SPI controller found in
>> Nuvoton MA35D1 SoCs.
>> +static int nuvoton_qspi_mem_exec_op(struct spi_mem *mem,
>> +				    const struct spi_mem_op *op)
>> +{
>> +	if (op->dummy.nbytes) {
>> +		nuvoton_qspi_set_bus_width(qspi, op->dummy.buswidth,
>> +					   SPI_MEM_DATA_IN);
>> +		ret = nuvoton_qspi_txrx(qspi, NULL, NULL, op->dummy.nbytes);
>> +		if (ret)
>> +			goto out_deassert_cs;
>> +	}
> I would expect dummy data to be an output rather than an input, we don't
> want the lines left floating?  There's a similar thing below when
> setting up the dummy xfer.

Hi Mark,

Thanks for pointing this out.

You are right. The dummy phase should be driven as an output rather than 
leaving the data lines in input mode.

I will update the direct spi-mem path to use SPI_MEM_DATA_OUT for the 
dummy phase. I will also fix the generic transfer path so that spi-mem 
dummy transfers remain output transfers instead of switching the lines 
to input.

Best regards,
Chi-Wen