Re: [PATCH v5 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Add Nuvoton MA35D1 QSPI
Mark Brown <[email protected]> Fri, 31 Jul 2026 21:28:19 +0100
| Newsgroups | org.kernel.vger.linux-spi,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <[email protected]> |
--Cs5fTReg+qQ322w5 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jul 31, 2026 at 10:38:17AM +0800, Chi-Wen Weng wrote: > From: Chi-Wen Weng <[email protected]> >=20 > Add a devicetree binding for the Quad SPI controller found in > Nuvoton MA35D1 SoCs. This leaves the generic binding's support for GPIO chip selects enabled but the driver doesn't set use_gpio_descriptors so they don't actually work. Either the binding or the driver needs an update. Otherwise things seem mostly OK so I'll apply, please send an incremental patch for this. --Cs5fTReg+qQ322w5 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmptBWIACgkQJNaLcl1U h9Bvdwf+IyO6Hu9Z5099OlvPR/gx0z5P+A2YPrWyLLDOKaffMb1GC8evhY20FanO e/xY0SsVy0K4M5UwbfvOBfK4eBfMujZO48FaFx/7eSWrs9H2pHytLSdJfN6DXrFr 93XpW0f0gafiU8vxRMu2mY7fnqR3B7VtdhsjIW09gCG44LxWi3YbIE4s/IQVCQT1 QnUB6DSjDB6e7YNDha19LVEqjdp/vxZgmpsEt43xs9TvZqC5iyOn3Ycuuxy7/eLm y66Vr4vMVCTkkQ9jbR0orEdJzKY5I1QKcrJUc0+0/kX1FTrXPp5QcxCH2/ex6yGk UWID0/HT7/b3Vv5M3v3M3QyVljIl2A== =GnHY -----END PGP SIGNATURE----- --Cs5fTReg+qQ322w5--