[PATCH v2 10/11] spi: dt-bindings: snps,dw-apb-ssi: Add starfive,jhb100-sfc
Changhuang Liang <[email protected]> Mon, 3 Aug 2026 05:40:43 -0700
| Newsgroups | org.kernel.vger.linux-spi,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add a new compatible string "starfive,jhb100-sfc" for the StarFive JHB100 SPI Flash Controller, it based on the Synopsys DesignWare SSI version 2.00a but with minor modifications. Due to these minor modifications, it only supports access for flash memory and requires a system controller register to configure the address mode filter for SPI NOR flash devices. The starfive,sfc-filter-syscon property is required to provide a phandle to the system controller that manages switching between 3-byte and 4-byte addressing modes, essential for supporting SPI NOR flash devices with different address width requirements. Signed-off-by: Changhuang Liang <[email protected]> Acked-by: Conor Dooley <[email protected]> --- .../bindings/spi/snps,dw-apb-ssi.yaml | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index 4458316326fc..f13cb963db88 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -33,6 +33,17 @@ allOf: else: properties: amd,pensando-elba-syscon: false + - if: + properties: + compatible: + contains: + const: starfive,jhb100-sfc + then: + required: + - starfive,sfc-filter-syscon + else: + properties: + starfive,sfc-filter-syscon: false properties: compatible: @@ -68,6 +79,8 @@ properties: const: amd,pensando-elba-spi - description: Canaan Kendryte K210 SoS SPI Controller const: canaan,k210-spi + - description: StarFive JHB100 SoC SPI Flash Controller + const: starfive,jhb100-sfc - description: Renesas RZ/N1 SPI Controller items: - const: renesas,r9a06g032-spi # RZ/N1D @@ -139,6 +152,15 @@ properties: Block address to control SPI chip-selects. The Elba SoC system controller provides an interface to override the native DWC SSI CS control. + starfive,sfc-filter-syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle to the system controller register that controls the SPI NOR flash + address mode filter. This system controller interface provides additional + configuration to switch between 3-byte and 4-byte addressing modes, which + is required when accessing SPI NOR flash devices with different address + width requirements. + patternProperties: "@[0-9a-f]$": type: object -- 2.25.1