Re: [PATCH v9 4/4] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264
Nicolin Chen <[email protected]> Sun, 26 Jul 2026 10:20:10 -0700
| Newsgroups | org.kernel.vger.linux-tegra,dev.linux.lists.iommu,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-doc,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <amZByocd+B+fMk/[email protected]> |
On Sun, Jul 26, 2026 at 08:19:04AM +0000, Ashish Mhetre wrote: > Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can > survive an invalidation that races with concurrent traffic targeting > the same entry. The hardware-recommended software workaround is to > issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and > that infrastructure is already in place behind > arm_smmu_erratum_repeat_tlbi_cfgi_key. > > Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware > detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT > support) and already has a dedicated "nvidia,tegra264-smmu" compatible, > so DT-probe is the only viable detection path. > > Enable the workaround on instances matching the existing > "nvidia,tegra264-smmu" compatible by calling static_branch_enable() on > arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in > Documentation/arch/arm64/silicon-errata.rst. > > Signed-off-by: Ashish Mhetre <[email protected]> Reviewed-by: Nicolin Chen <[email protected]>