Re: [PATCH] clocksource/drivers/arm_arch_timer: Workaround bcm2712 broken EL2 virtual timer

Jon Hunter <[email protected]> Mon, 27 Jul 2026 14:07:47 +0100
Newsgroups org.kernel.vger.linux-tegra,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel
Message-ID <[email protected]>
On 23/07/2026 11:46, Marc Zyngier wrote:

...

>> Hmmm, I am looking at this spec [0] and it says ...
>>
>> "The GIC-400 implements the interrupt types:
>>    16 Software Generated Interrupts (SGIs).
>>    6 external Private Peripheral Interrupts (PPIs) for each processor.
>>    1 internal PPI for each processor."
>>
>> The table in [1] shows interrupts for non-sec, sec, virt and
>> hypervisor timers, but I don't see a hyp-virt.
> 
> This documentation was never updated past 2012, which predates ARMv8.1
> (go complain to ARM). But the IP does support it:
> 
> [    0.000000] Machine model: Khadas VIM3L
> [...]
> [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
> [    0.000000] Root IRQ handler: gic_handle_irq
> [    0.000000] GIC: Using split EOI/Deactivate mode
> [    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
> [    0.000000] arch_timer: cp15 timer running at 24.00MHz (hyp-virt).
> [    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
> [    0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
> 
> GIC400, A55 cores. Produced by one of the worse SoC vendor on this
> side of the galaxy.
> 
> And the signal you are looking for is the one labelled as "Legacy FIQ
> signal" (PPI12, aka INTID 28). The labels are purely indicative of
> what you *could* connect to it, not a requirement.
> 
> Anyway, this is beside the point. Even if the IP didn't support it,
> you shouldn't end-up with a design that explicitly contradict the
> architecture, because that's the contract SW relies on.

Got it. Armed with this information I went back to the h/w folks and was 
able to track down the right person. I have now learnt that this timer 
interrupt is hooked up to PPI15 for Tegra194 and using that I now see ...

[    0.000000] Machine model: NVIDIA Jetson AGX Xavier Developer Kit
...
[    0.000000] arch_timer: cp15 timer running at 31.25MHz (hyp-virt).

I will post a patch to fix this for Tegra194.

Jon

-- 
nvpublic