Re: [PATCH v2 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node
Mikko Perttunen <[email protected]> Thu, 30 Jul 2026 15:48:02 +0900
| Newsgroups | org.kernel.vger.linux-tegra,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On Tuesday, July 21, 2026 7:10=E2=80=AFPM Svyatoslav Ryhel wrote: > Enable DFLL for ASUS TF701T since it is now supported by Tegra114. >=20 > Signed-off-by: Svyatoslav Ryhel <[email protected]> > --- > arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 8 ++++++++ > 1 file changed, 8 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm= /boot/dts/nvidia/tegra114-asus-tf701t.dts > index f02e2cf65fe82..5358cdb6efc10 100644 > --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > @@ -1621,6 +1621,14 @@ i2s@70080600 { > }; > }; > =20 > + /* CPU DFLL clock */ > + clock@70110000 { > + status =3D "okay"; > + nvidia,sample-rate =3D <11500>; > + nvidia,i2c-fs-rate =3D <400000>; > + vdd-cpu-supply =3D <&vdd_cpu>; > + }; > + > brcm_wifi_pwrseq: pwrseq-wifi { > compatible =3D "mmc-pwrseq-simple"; > =20 > --=20 > 2.53.0 >=20 >=20 Reviewed-by: Mikko Perttunen <[email protected]>