Re: Perf Reports Jump Instructions as Memory Access Instructions

Thanks! This seems reasonable. But as Arnaldo says, why is there a skid 
in the access address while PEBS is used? Both RIP and Access Address 
should match, Right?
Regards.

On 2020-05-26 21:12, Andi Kleen wrote:

> The access point is at offset 0 of the following disassembly:
   > Dump of assembler code for function 
cairo_surface_get_device_scale@plt:

>> 0x000000000002a310 <+0>:     jmpq   *0x2c8b3a(%rip)        # 0x2f2e50
>> 0x000000000002a316 <+6>:     pushq  $0x1c7
>> 0x000000000002a31b <+11>:    jmpq   0x28690
>> 
>> This is an unconditional jump which will not lead to macrofusion.

But that will access memory, no? The instruction at offset 0.
Instruction fetches are not sampled by the MEM_INST_RETIRED event.

This is an indirect jump through memory, so it accesses the memory at
0x2c8b3a(%rip). These kind of accesses are sampled by the event.

Other memory accesses as part of other instructions may be sampled too.

-Andi