Re: [PATCH v3 1/6] dt-bindings: clock: agilex5: Add USB3.1 reference clock ID
Krzysztof Kozlowski <[email protected]>
| Newsgroups | org.kernel.vger.linux-usb,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <20260812-fascinating-uncovered-poodle-b6e6a1@quoll> |
On Wed, Aug 12, 2026 at 03:32:54PM +0800, Adrian Ng Ho Yin wrote: > The Synopsys DWC3 USB3.1 controller requires two separately named > clocks: a suspend clock and a reference clock. The existing binding > only exposes AGILEX5_USB31_SUSPEND_CLK. Add AGILEX5_USB31_REF_CLK > to allow DT nodes to reference the reference clock by its own ID, > and update AGILEX5_NUM_CLKS accordingly. > > Signed-off-by: Adrian Ng Ho Yin <[email protected]> > --- > include/dt-bindings/clock/intel,agilex5-clkmgr.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/intel,agilex5-clkmgr.h b/include/dt-bindings/clock/intel,agilex5-clkmgr.h > index 2f3a23b31c5c..196c0bad3e52 100644 > --- a/include/dt-bindings/clock/intel,agilex5-clkmgr.h > +++ b/include/dt-bindings/clock/intel,agilex5-clkmgr.h > @@ -95,6 +95,7 @@ > #define AGILEX5_SOFTPHY_REG_PCLK 79 > #define AGILEX5_SOFTPHY_PHY_CLK 80 > #define AGILEX5_SOFTPHY_CTRL_CLK 81 > -#define AGILEX5_NUM_CLKS 82 > +#define AGILEX5_USB31_REF_CLK 82 > +#define AGILEX5_NUM_CLKS 83 Playing old record: you cannot change it. If you change it, then it is not a binding. Best regards, Krzysztof