Re: [PATCH RFC v2 5/9] dt-bindings: watchdog: renesas,r9a09g057-wdt: Add SYS syscon support
"Lad, Prabhakar" <[email protected]> Tue, 14 Jul 2026 14:14:48 +0100
| Newsgroups | org.kernel.vger.linux-watchdog,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-renesas-soc |
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| Message-ID | <CA+V-a8t1TbnD14s-d=UVTL58jWA9Sxcyb6mt9tfgAMBUkoJmRA@mail.gmail.com> |
Hi Geert, Thank you for the review. On Mon, Jul 13, 2026 at 4:55 PM Geert Uytterhoeven <[email protected]> wrote: > > Hi Prabhakar, > > On Thu, 2 Jul 2026 at 14:31, Prabhakar <[email protected]> wrote: > > From: Lad Prabhakar <[email protected]> > > > > On the Renesas RZ/T2H SoC, the Watchdog Timer Control Register (WDTDCR) > > resides within the System Controller (SYS) block rather than the WDT > > address space itself. > > > > Previously, this was handled by including a second register range in the > > "reg" property. However, this is architecturally incorrect as the SYS > > block consists of two distinct regions (0x80290000 and 0x81290000) that > > contain registers for multiple peripheral blocks. > > > > Now that the SYS driver provides a unified syscon regmap, introduce the > > "renesas,sys" phandle-array property to allow the WDT driver to > > access its control register via the system controller. > > > > Mark the use of a second "reg" entry as deprecated in favor of the > > new phandle-array approach for SoCs that require WDTDCR access. > > > > Signed-off-by: Lad Prabhakar <[email protected]> > > --- > > v1->v2: > > - No change. > > Thanks for the update! > > > --- a/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml > > +++ b/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml > > @@ -48,6 +48,17 @@ properties: > > resets: > > maxItems: 1 > > > > + renesas,sys: > > In Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml, > the similar property is called "renesas,sysc". > Ok, I will rename this to "renesas,sysc". > > + description: > > + System controller registers control the start/stop of the WDT, and halt debug. > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + items: > > + - items: > > + - description: phandle to system controller > > + - description: watchdog IP instance index > > + minimum: 0 > > + maximum: 5 > > + > > timeout-sec: true > > > > required: > > @@ -73,15 +84,29 @@ allOf: > > minItems: 2 > > clock-names: > > minItems: 2 > > + renesas,sys: false > > else: > > properties: > > clocks: > > maxItems: 1 > > clock-names: > > maxItems: 1 > > - reg: > > - minItems: 2 > > resets: false > > + allOf: > > + - if: > > + required: > > + - renesas,sys > > + then: > > + properties: > > + reg: > > + maxItems: 1 > > + else: > > + properties: > > + reg: > > + description: Deprecated. Use renesas,sys to pass the offset > > + of WDTDCR register instead. > > the index of the watchdog IP instance? > I will update the description to "Deprecated. Use the renesas,sysc property along with the watchdog IP instance index instead." Cheers, Prabhakar