Re: [PATCH net-next v13 09/11] net: mdio: realtek-rtl9300: Add support for RTL838x
Andrew Lunn <[email protected]>
| Newsgroups | org.kernel.vger.netdev,org.kernel.vger.linux-devicetree |
|---|---|
| Message-ID | <[email protected]> |
On Fri, Aug 07, 2026 at 07:10:56PM +0200, Markus Stockhausen wrote: > The MDIO driver has been prepared for multiple device support. Add all > required bits for the RTL838x (aka maple) series. This is straightforward > but some things are worth mentioning. > > - The device has a lot in common with the RTL930x series. It has 28 ports, > 4096 (Realtek) pages and 4 MMIO registers. With this a lot of the > existing RTL9300 defines could be reused. But to avoid confusion and > for better readability duplicate the defines with a proper prefix. > - The MDIO engine has no fail bit. Thus the mask is set to zero. > - There is only one SMI bus for 1G PHYs. No bus_map_base register exists. > - The setup_controller() function needs no C45 setup but must activate > the PHY access. > > As per the SDK the PHYs on a RTl83xx bus are mainly C22 driven. The > polling unit works in C22 mode and the devicetree usually does not > make use of the ethernet-phy-ieee802.3-c45 flag. Nevertheless there are > some PHY MMD registers (e.g. EEE) that might be of interest for the > future development of the hardware. Until that is really needed keep > the C45 read/write helpers out of the driver. > > Signed-off-by: Markus Stockhausen <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Andrew