[PATCH net-next 1/2] dt-bindings: net: fsl,fec: add fsl,rx-flush-queues

From: Alexander Sverdlin <[email protected]>

The FEC/ENET controller can enable receive flushing per RX queue via the
QOS Scheme register (RX_FLUSHn bits). When enabled, a frame at the head of
the RX FIFO that cannot be forwarded (because its ring has no empty buffer
descriptor) is discarded instead of blocking the FIFO.

Add the fsl,rx-flush-queues property to describe the set of RX queues for
which flushing is enabled. Most controllers are subject to erratum
ERR050395 and support flushing on a single queue only; the driver enforces
that constraint, so keep the binding generic to allow future controllers
with the erratum fixed to enable flushing on several queues.

Signed-off-by: Alexander Sverdlin <[email protected]>
---
 .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
index 24e863fdbdab0..808aaf3fd9f27 100644
--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -162,6 +162,20 @@ properties:
       Should specify the rx queue number, otherwise set rx queue number to 1.
     enum: [1, 2, 3]
 
+  fsl,rx-flush-queues:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    minItems: 1
+    maxItems: 3
+    items:
+      enum: [0, 1, 2]
+    description:
+      List of RX queue indices for which the receive flushing feature (QOS
+      Scheme register RX_FLUSHn) is enabled. When enabled, a frame at the head
+      of the RX FIFO that cannot be forwarded (because its ring has no empty
+      buffer descriptor) is discarded instead of blocking the FIFO. On most
+      controllers erratum ERR050395 restricts flushing to a single queue. If
+      absent, RX flushing is disabled for all queues.
+
   fsl,magic-packet:
     $ref: /schemas/types.yaml#/definitions/flag
     description:
-- 
2.55.0