Re: [PATCH v2 8/8] ARM: dts: qcom: Add Samsung Galaxy S4

"MINETTE Alexandre" <[email protected]>
Newsgroups org.kernel.vger.phone-devel,dev.linux.lists.iommu,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel
Message-ID <[email protected]>
Thanks a lot for the suggestion, I checked the downstream board files
and it does not look like these buses are wired for GSBI.

There, the MAX77693 bus is instantiated as a dedicated i2c-gpio bus on
GPIO 22/23, and the AN30259A LED bus as a dedicated i2c-gpio bus on
GPIO 6/7. The native APQ8064 GSBI2/GSBI3 I2C pins are different
(GPIO 24/25 and GPIO 8/9), so these two buses do not seem to be wired
to the GSBI controllers on jflte.

Regards,
-- 
  MINETTE Alexandre
  [email protected]

Mar 28 avr 2026, à 10:57, Konrad Dybcio a écrit :
> On 4/27/26 9:34 PM, Alexandre MINETTE via B4 Relay wrote:
>> From: Alexandre MINETTE <[email protected]>
>> 
>> Add a device tree for the Samsung Galaxy S4, codenamed jflte.
>> 
>> This has been tested on a Samsung Galaxy S4 GT-I9505. The initial support
>> covers UART, USB peripheral mode with USB networking, the front LED and
>> the physical buttons.
>> 
>> Signed-off-by: Alexandre MINETTE <[email protected]>
>> ---
>>  arch/arm/boot/dts/qcom/Makefile                    |   1 +
>>  .../boot/dts/qcom/qcom-apq8064-samsung-jflte.dts   | 485 +++++++++++++++++++++
>>  2 files changed, 486 insertions(+)
>> 
>> diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
>> index 32a44b02d2fa..c23c961f79e3 100644
>> --- a/arch/arm/boot/dts/qcom/Makefile
>> +++ b/arch/arm/boot/dts/qcom/Makefile
>> @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
>>  	qcom-apq8064-ifc6410.dtb \
>>  	qcom-apq8064-sony-xperia-lagan-yuga.dtb \
>>  	qcom-apq8064-asus-nexus7-flo.dtb \
>> +	qcom-apq8064-samsung-jflte.dtb \
>>  	qcom-apq8064-lg-nexus4-mako.dtb \
>
> 'l'g < 's'amsung
>
> [...]
>
>> +	i2c-led {
>> +		compatible = "i2c-gpio";
>> +		sda-gpios = <&tlmm_pinmux 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>> +		scl-gpios = <&tlmm_pinmux 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>
> Have you tried setting up the I2C-GPIO busses as GSBI devices, like
> I think I suggested the last time? This will potentially bring power
> and latency benefits, since there's an actual bus controller
> connected to these pins
>
> Konrad
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